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CS5535 数据表(PDF) 22 Page - National Semiconductor (TI) |
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CS5535 数据表(HTML) 22 Page - National Semiconductor (TI) |
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22 / 555 page  www.national.com 22 Revision 0.8 Signal Definitions (Continued) D1 GPIO9 I/O Q7 UART1_RX I AUX_IN UART1_IR_RX I D2 GPIO6 I/O Q7 MFGPT0_RS I AUX_IN MFGPT1_C1 O AUX_OUT_1 MFGPT2_C2 O AUX_OUT_2 D3 GPIO5 I/O Q7 MFGPT1_RS I AUX_IN MFGPT0_C1 O AUX_OUT_1 D4 VIO PWR --- D5 VSS GND --- D6 VIO PWR --- D7 VSS GND --- D8 VCORE PWR --- D9 VIO PWR --- D10 VCORE PWR --- D11 VSS GND --- D12 VIO PWR --- D13 VSS GND --- D14 VIO PWR --- D15 IDE_DATA5 I/O IDE BOS[1:0] = 00 or 11 FLASH_AD15/IO5 I/O BOS[1:0] = 10 D16 IDE_DATA10 I/O IDE BOS[1:0] = 00 or 11 FLASH_AD20/AD5 O BOS[1:0] = 10 D17 IDE_DATA9 I/O IDE BOS[1:0] = 00 or 11 FLASH_AD19/AD4 O BOS[1:0] = 10 E1 GPIO3 I/O SMB UART2_RX I AUX_IN E2 GPIO4 I/O SMB UART2_TX O AUX_OUT_1 E3 GPIO8 I/O Q7 UART1_TX O AUX_OUT_1 UART1_IR_TX O AUX_OUT_2 E4 VSS GND --- E14 VSS GND --- E15 IDE_DATA6 I/O IDE BOS[1:0] = 00 or 11 FLASH_AD16/IO6 I/O BOS[1:0] = 10 E16 IDE_DATA7 I/O IDE BOS[1:0] = 00 or 11 FLASH_AD17/IO7 I/O BOS[1:0] = 10 E17 IDE_DATA8 I/O IDE BOS[1:0] = 00 or 11 FLASH_AD18/AD3 O BOS[1:0] = 10 F1 GPIO15 I/O SMB SMB_DATA I/O AUX_IN and AUX_OUT_1 Ball No. Signal NameNote 1 Type Buffer TypeNote 2 Configuration F2 GPIO13 I/O Q7 SLEEP_BUT I AUX_IN F3 FUNC_TEST I SMB F4 VIO PWR --- F14 VIO PWR --- F15 IDE_RESET# O IDE F16 AVSS_USB AGND AVSS_USB F17 AVDD_USB APWR AVDD_USB G1 LPC_DRQ# I PCI Ball Opt MSR [6,4] = 1,1 GPIO20 I/O Ball Opt MSR [6] = 0 G2 LPC_SERIRQ I/O PCI Ball Opt MSR [6,5] = 1,1 GPIO21 I/O Ball Opt MSR [6] = 0 MFGPT2_RS I AUX_IN G3 GPIO14 I/O SMB SMB_CLK I/O AUX_IN and AUX_OUT_1 G4 VSS GND --- G14 VSS GND --- G15 NC --- --- G16 USB2_2_DATNEG I/O Bare_Wire G17 USB2_2_DATPOS I/O Bare_Wire H1 LPC_CLK I Q7 H2 LPC_AD0 I/O PCI Ball Opt MSR [6] = 1 GPIO16 I/O Ball Opt MSR [6] = 0 H3 LPC_FRAME# O PCI Ball Opt MSR [6] = 1 GPIO22 I/O Ball Opt MSR [6] = 0 H4 VCORE PWR --- H14 VCORE PWR --- H15 NC --- --- H16 USB2_1_DATNEG I/O Bare_Wire H17 USB2_1_DATPOS I/O Bare_Wire J1 LPC_AD2 I/O PCI Ball Opt MSR [6] = 1 GPIO18 I/O Ball Opt MSR [6] = 0 J2 LPC_AD1 I/O PCI Ball Opt MSR [6] = 1 GPIO17 I/O Ball Opt MSR [6] = 0 J3 GPIO12 I/O Q7 AC_S_IN2 I AUX_IN SLEEP_Y O AUX_OUT_2 Ball No. Signal NameNote 1 Type Buffer TypeNote 2 Configuration Table 2-2. Ball Assignments: Sorted by Ball Number (Continued) |
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