CS5535 datasheet(51/555 Pages) NSC

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Global Concepts and Features (Continued)

When a request packet arrives from a Request Out (RO)

port, the address and other attributes in the packet are

used to look up the destination port. If the port Request In

(RI) is available, the request is passed. If there are multiple

requests, priorities are used to establish which requestor

and destination port utilize the transfer cycle. A transfer

from an RO to an RI takes one clock edge.

3.1.3

Response Packets

Earlier in this section, it was indicated that an RO can be

used to present a write data packet or a read response

packet. The use and need of a read response packet for a

read request is obvious. However, there is also an optional

write response packet. This tells the requestor that the

write has completed. This is used to hold a processor I/O

write instruction until the response is received, that is, I/O

writes are never posted. Memory writes are always posted.

The response packet is also used to generate Synchro-

nous System Management Interrupts (SSMIs). System

Management Mode (SMM) is used for hardware emulation

and other traps. An SSMI can be generated by a GLD or

via special GLIU descriptors. When the response arrives

back at the processor, interface circuits generate an SMI to

invoke the SMM software. Lastly, all response packets con-

tain an exception flag that can be set to indicate an error.

3.1.4

ASMI and Error

Two additional signals are needed to complete this

GeodeLink architecture overview: Asynchronous System

Management Interrupt (ASMI) and Error. Each GLD out-

puts these ASMI and Error signals.

An ASMI is much like a legacy interrupt, except it invokes

the SMM handler. As the name suggests, an ASMI is an

asynchronous event, while an SSMI is synchronous to the

instruction that generated it.

The Error signal simply indicates some type of unexpected

error has occurred. A device asserts this signal when an

unexpected error occurs. In a normal operating system,

this would not be asserted. For example, a disk read error

or ethernet network error would be signaled using normal

GeodeLink packet mechanisms. This signal is reserved for

the truly unexpected.

Each GLD has mechanisms for enabling and mapping mul-

tiple internal sources down to these singular outputs. The

mechanism consists of the logical “OR” of all enabled

sources. The GLIU receives the ASMI and Error pair from

each GLD. It has the same “OR” and enable mechanism

that finally results in a single ASMI and Error pair for the

whole component (see Figure 3-2). The ASMI is routed to

the processor, while the Error is routed to the GLCP. Within

the GLCP, the Error signal can be mapped into an ASMI for

routing back into the GLIU.

Figure 3-2. GeodeLink Architecture ASMI and Error Routing

ASMI

& Error

ASMI

& Error

ASMI

& Error

ASMI

& Error

ASMI

& Error

ASMI

& Error

ASMI

& Error

ASMI

& Error

GLCP

USBC1

ACC

ATAC

USBC2

GLPCI_SB

GLIU ASMI & Error

CS5535 Error to GLCP Debug

or conversion to ASM

CS5535 ASMI to GX2

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