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CS5535 数据表(PDF) 76 Page - National Semiconductor (TI) |
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CS5535 数据表(HTML) 76 Page - National Semiconductor (TI) |
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76 / 555 page ![]() www.national.com 76 Revision 0.8 4.2 GEODELINK PCI SOUTH BRIDGE The GeodeLink PCI Bus South Bridge (GLPCI_SB) pro- vides a PCI interface for GeodeLink Device based designs. Its three major functions are: 1) Acting as a PCI slave and transforming PCI transac- tions to GLIU transactions as a GLIU master. 2) Acting as a GLIU slave and transforming GLIU trans- actions to PCI bus transactions as a PCI master. 3) Providing a CPU serial interface that conveys system information such as interrupts, SSMI, ASMI, etc. Features include: • PCI v2.2 compliance. Optional signals PERR#, SERR#, LOCK#, and CLKRUN are not implemented. • 32-bit, 66 MHz PCI bus operation and 64-bit, 66 MHz GeodeLink Device operation. • Target support for fast back-to-back transactions. • Zero wait state operation within a PCI burst. • MSR access mailbox in PCI configuration space. • Capable of handling in-bound transactions after RESET_OUT# + 2 clock cycles. • Dynamic clock stop/start support for GeodeLink and PCI clock domains via power management features. • Programmable IDSEL selection. • Support active decoding for Legacy I/O space 000h to 3FFh and DMA High Page 480h to 48Fh. • Support subtractive decode for memory and I/O space. • Special performance enhancements for fast IDE PIO data transfers. The GLPCI_SB module is composed of the following major blocks: • GeodeLink Interface • FIFO/Synchronization • Transaction Forwarding • PCI Bus Interface • CPU Interface Serial (CIS) The GLIU and PCI bus interfaces provide adaptation to the respective buses. The Transaction Forwarding block pro- vides bridging logic. The CIS block provides serial output to the CPU for any change in SSMI and the selected side- band signals. Little endian byte ordering is used on all sig- nal buses. Figure 4-2 is a block diagram of the GLPCI_SB module. Figure 4-2. GLPCI_SB Block Diagram GeodeLink Interface PCI Bus Interface PCI Bus Request Request Data REQ# / GNT# MSR Transaction Forwarding FIFOs/Synchronization CIS Side-band signals GX2 CIS |
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