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CS5535 数据表(PDF) 32 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 CS5535
功能描述  Geode??CS5535 I/O Companion Multi-Function South Bridge
PDF  555 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

CS5535 数据表(HTML) 32 Page - National Semiconductor (TI)

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Revision 0.8
Signal Definitions (Continued)
SUSP#
P3
O
Suspend. This signal goes low in response to events as determined
by the CS5535’s internal power management logic. It requests the
GX2 to enter the Suspend state. This is the default state for this ball at
reset. Not used in normal operation.
CIS
O
CPU Interface Serial. A 20-bit serial status word is output on this ball,
synchronized to PCI_CLK. Data changes on the rising edge and is
stable on the falling edge of PCI_CLK. This word is output whenever
one of the internally-monitored signals changes states. See Section
4.2.14 "CPU Interface Serial (CIS)" on page 79 for details. Used in
normal operation.
SUSPA#
N1
I
Suspend Acknowledge. This input signal is driven low by the GX2
processor when it has successfully entered the Suspend state.
IRQ13
K2
I
Interrupt Request Level 13. Floating Point error. Connect directly to
IRQ13 of the GX2 processor.
VBAT
A3
Wire
Real-Time Clock Battery Back-Up. Battery voltage on this ball
keeps the real-time clock and CMOS RAM circuits continuously pow-
ered.
If not used, tie to ground.
2.4-3.6V, typical 3.0V.
10 µA max.
5 µAs typical.
This ball incorporates a reverse bias protection diode on-chip.
There is no need for an external diode.
VSS_VBAT1
C4
AGND
Real-Time Clock Battery Grounds 1 and 2
VSS_VBAT2
B2
LVD_EN#
C7
Wire
Low Voltage Detect Enable. LVD_EN# enables/disables the on-chip
low voltage detect circuit. When disabled, the external subsystem
must assert RESET_STAND# as Standby power is applied and must
assert RESET_WORK# as Working power is applied. When LVD is
enabled, use of these two resets are optional. Generally,
RESET_STAND# would be tied high (not used) while
RESET_WORK# would be tied to a reset output that is typically avail-
able from the power supply. However, a system could just have a sim-
ple regulator circuit and also tie RESET_WORK# high.
Tie to VSS to enable. Tie to VIO_VSB to disable.
2.2.1
System Interface Signals (Continued)
Signal Name
Ball No.
Type
Description



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