CS5535 datasheet(295/555 Pages) NSC

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5.6

DIVERSE INTEGRATION LOGIC REGISTER DESCRIPTIONS

All registers associated with Diverse Integration Logic

(DIVIL) are MSRs:

• Standard GeodeLink Device MSRs

• DIVIL Specific MSRs

The MSRs are accessed via the RDMSR and WRMSR pro-

cessor instructions. The MSR address is derived from the

perspective of the CPU Core. See Section 3.2 "CS5535

MSR Addressing" on page 53 for more details on MSR

addressing.

All MSRs are 64 bits, however, some DIVIL MSRs are

called out as 32 bits. The DIVIL (MDD) treats writes to the

upper 32 bits (i.e., bits [63:32]) of the 32-bit MSRs as don’t

cares and always returns 0 on these bits.

The Standard GeodeLink Device MSRs are summarized in

Table 5-17 and the DIVIL Specific MSRs are summarized

in Table 5-18. The reference column in the tables point to

the page where the register maps and bit descriptions are

listed. Some notations in the reference column also point to

other chapters. These MSRs are physically located in the

DIVIL, but the descriptions are documented with the asso-

ciated module and are listed here only for completeness.

Table 5-17. Standard GeodeLink Device MSRs Summary

MSR

Address

Type

Reset Value

Reference

51400000h

GeodeLink Device Capabilities MSR

(DIVIL_GLD_MSR_CAP)

00000000_002DF0xxh

Page 299

51400001h

R/W

GeodeLink Device Master Configuration MSR

(DIVIL_GLD_MSR_CONFIG)

00000000_0000F000h

Page 300

51400002h

R/W

GeodeLink Device SMI MSR

(DIVIL_GLD_MSR_SMI)

00000000_00000000h

Page 300

51400003h

R/W

GeodeLink Device Error MSR

(DIVIL_GLD_MSR_ERROR)

00000000_00000000h

Page 303

51400004h

R/W

GeodeLink Device Power Management MSR

(DIVIL_GLD_MSR_PM)

00000000_00000000h

Page 306

51400005h

R/W

GeodeLink Device Diagnostic MSR

(DIVIL_GLD_MSR_DIAG)

00000000_00000000h

Page 307

51400006h-

51400007h

R/W

DD Reserved MSRs (DD_MSR_RSVD) (Reads

return 1; writes have no effect.)

FFFFFFFF_FFFFFFFFh

---

Table 5-18. DIVIL Specific MSRs Summary

MSR

Address

Type

Reset Value

Reference

51400008h

R/W

Local BAR - IRQ Mapper (DIVIL_LBAR_IRQ)

I/O Space - Use of this LBAR is optional. IRQ

Mapper is always accessible via MSR space.

00000000_00000000h

Page 307

51400009h

R/W

Local BAR - KEL from USB Host Controller 1

(DIVIL_LBAR_KEL1)

Memory Space - First of two ways to access KEL.

KEL operation is not dependent on KEL1 or KEL2

access.

00000000_00000000h

Page 308

5140000Ah

R/W

Local BAR - KEL from USB Host Controller 2

(DIVIL_LBAR_KEL2)

Memory Space - Second of two ways to access

KEL. KEL operation is not dependent on KEL1 or

KEL2 access.

00000000_00000000h

Page 308

5140000Bh

R/W

Local BAR - SMB (DIVIL_LBAR_SMB)

I/O Space - Local Base Address Register for SMB

Controller native registers.

00000000_00000000h

Page 309

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