CS5535 datasheet(101/555 Pages) NSC

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PIT Functional Description (Continued)

4.7.1

Programming the 8254 PIT

Programming of the 8254 PIT is initiated by first writing one

control word via I/O Address 043h into the PIT Mode Con-

trol Word register. It is followed by writing one or two data

bytes via the I/O address of the intended counter. If the

Control register is loaded once, the counters may be over-

written with different values without accessing the Control

ious registers.

The Control register in the 8254 PIT is write-only, but cer-

tain control information can be determined by the read-

back (read-status) command.

4.7.1.1

Write to the Counters

To load a counter with new values, a control word needs to

output that defines the intended counter, number and type

of bytes to write, the counting mode and the counting for-

mat. Bits [5:4] of the Control Word register (see Section

5.8.2.7 on page 329) indicate whether low-order or high-

order or both are going to be written. If low-order or high-

order counter byte only is specified to be written, then only

that byte can be read during a read access. According to

bits [5:4] of the Control Word register, one needs to write

either the low-order or the high-order or both into the

counter after passing the control word. If bits [5:4] of the

Control Word register is 11, then a low-order byte needs to

be written first, followed by a high-order byte. For small

counting values or counting values that are multiples of

256, it is sufficient to pass the low-order or high-order

counter byte. Bits [3:1] of the Control Word register define

the counting mode of the counter selected by bits [5:4]. Bit

0 of the Control Word register defines the binary or BCD

counting format. The maximum loadable count value is not

FFFFh (binary counting) or 9999 (BCD counting), but 0. On

the next CLK pulse the counter concerned jumps to FFFFh

or 9999. Once the value is decreased to 0 again, it outputs

a signal according to the programmed mode. Therefore,

the value 0 corresponds to 2^16 for binary counting and

10^4 for BCD counting.

Read from the Counters

There are three options for reading a counter in the 8254

PIT:

Counter Latch command

Read-back (read-status) command

Direct Read

To read a counter, the third option (Direct Read) should not

be used. The Counter Latch command or Read-back com-

mand should be used to transfer the current state of the

counter into its output latches. One or two successive read

counter instructions for the port address of the counter con-

cerned reads these latches. If only the low-order or high-

order byte was written when the counter was loaded with

the initial counting value, then read the current counting

value of the initially written byte by a single read counter

instruction. If both the low-order and high-order counter

bytes are written previously, then to read the current

counter value, two read counter instructions are needed.

The 8254 PIT returns the low-order byte of the 16-bit

counter with the first read counter instruction, and then the

high-order byte with the second read counter instruction. If

the content of the counter has been transferred once by a

counter latch command into the output latches, then this

value is held there until the CPU executes one or two

counter read instructions, or until the corresponding

counter is reprogrammed. Successive counter latch com-

mands are ignored if the output latches haven’t been read

before. Figure 4-15 shows the format of the control word for

the counter latch command.

Figure 4-15. PIT Counter Latch Command Format

Table 4-11. 8254 PIT Register Ports

I/O Address

Access Type

040h

Counter 0

Read/ Write

041h

Counter 1

Read / Write

042h

Counter 2

Read / Write

043h

Control Word

Write

Bits [7:6] = Select counter to latch

7654321

xxxx

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