CS5535 datasheet(158/555 Pages) NSC

158 / 555 page

www.national.com

158

Revision 0.8

MFGPT Functional Description (Continued)

4.16.5 Working Power Domain Logic

The Working power domain logic consists of the Local Bus

Interface, Control Logic, MSRs, and NMI, IRQ, and Reset

Output Events.

When Event mode is enabled, the NMI, IRQ, and Reset

Output Events logic gathers the event outputs of all eight

MFGPTs and then generates the interrupt and resets out-

puts based on MSR settings. The interrupt outputs go to

the PIC that can then trigger an IRQ or ASMI. Note that

MFGPT6 and MFGPT7 cannot trigger reset. These outputs

are controlled by MSR bits, and the NMI output can be fur-

ther controlled by the MSB of I/O Address 070h.

4.16.6 Power Domain Crossing Interface Logic

The asynchronous internal Standby State signal will dis-

able/enable the Working power domain interface immedi-

ately. Therefore, any bus operation active at that time will

have an indeterminate result.

Table 4-33. MFGPT Pulse Density Modulation Example

Up Counter Output

Bit Reverse Output

Pulse Train Output for Given Compare 1 Value (Note 1)

124

000

001

100

010

011

110

100

001

101

110

011

111

Note 1. Compare 2 Value must be set to all 1s for pulse density modulation.

CS5535 数据表(PDF) 158 Page - National Semiconductor (TI)

CS5535 数据表(HTML) 158 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载