LPC2917 datasheet(41/68 Pages) PHILIPS

41 / 68 page

LPC2917_19_1

Preliminary data sheet

Rev. 1.01 — 15 November 2007

41 of 68

NXP Semiconductors

LPC2917/19

ARM9 microcontroller with CAN and LIN

8.8.3 PCR subsystem clock description

The PCRSS is clocked by a number of different clocks. CLK_SYS_PCRSS clocks the

AHB side of the AHB to DTL bus bridge and CLK_PCR_SLOW clocks the CGU, RGU and

PMU internal logic, see Section 7.2.2. CLK_SYS_PCRSS is derived from

BASE_SYS_CLK, which can be switched off in low-power modes. CLK_PCR_SLOW is

derived from BASE_PCR_CLK and is always on in order to be able to wake up from

low-power modes.

8.8.4 Clock Generation Unit (CGU)

8.8.4.1

Overview

The key features are:

Fig 11. PCRSS block diagram

Power, Clock & Reset

RGU

CGU

RGU

registers

Input Deglitch/

Sync

POR

Reset Output

Delay Logic

branch

clocks

FDIV[6:0]

PLL

out0

out1

…

out9

Low Power

Ring Oscillator

(Ringo)

base

clocks

PMU

wakeup_a

AHB Master

Disable Grant

AHB Master

Disable Req

WARM_RST

COLD_RST

PCR_RST

RGU_RST

POR_RST

RSTN (device pin)

Reset from Watchdog counter

AHB_RST

...

SCU_RST

AHB2DTL

Bridge

CGU

registers

Xtal Oscillator

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