LPC2917 datasheet(48/68 Pages) PHILIPS

48 / 68 page

LPC2917_19_1

Preliminary data sheet

Rev. 1.01 — 15 November 2007

48 of 68

NXP Semiconductors

LPC2917/19

ARM9 microcontroller with CAN and LIN

8.8.5.3

RGU pin description

The RGU module in the LPC2917/19 has the following pins. Table 26 shows the RGU

pins.

8.8.6 Power Management Unit (PMU)

8.8.6.1

Overview

This module enables software to actively control the system’s power consumption by

disabling clocks not required in a particular operating mode.

Using the base clocks from the CGU as input, the PMU generates branch clocks to the

rest of the LPC2917/19. Output clocks branched from the same base clock are phase-

and frequency-related. These branch clocks can be individually controlled by software

programming.

The key features are:

• Individual clock control for all LPC2917/19 sub-modules

• Activates sleeping clocks when a wake-up event is detected

• Clocks can be individually disabled by software

• Supports AHB master-disable protocol when AUTO mode is set

• Disables wake-up of enabled clocks when power-down mode is set

• Activates wake-up of enabled clocks when a wake-up event is received

• Status register is available to indicate if an input base clock can be safely switched off

(i.e. all branch clocks are disabled)

8.8.6.2

Description

The PMU controls all internal clocks of the device for power-mode management. With

some exceptions, each branch clock can be switched on or off individually under control of

software register bits located in its individual configuration register. Some branch clocks

controlling vital parts of the device operate in a fixed mode. Table 27 shows which mode-

control bits are supported by each branch clock.

By programming the configuration register the user can control which clocks are switched

on or off, and which clocks are switched off when entering power-down mode.

Note that the standby-wait-for-interrupt instructions of the ARM968E-S processor (putting

the ARM CPU into a low-power state) are not supported. Instead putting the ARM CPU

into power-down should be controlled by disabling the branch clock for the CPU.

Remark: For any disabled branch clocks to be re-activated their corresponding base

clocks must be running (controlled by the CGU).

Table 27 shows the relation between branch and base clocks, see also Section 7.2.1.

Every branch clock is related to one particular base clock: it is not possible to switch the

source of a branch clock in the PMU.

Table 26.

RGU pins

Symbol

Directio

Description

RSTN

external reset input, Active LOW; pulled up internally

LPC2917 数据表(PDF) 48 Page - NXP Semiconductors

LPC2917 数据表(HTML) 48 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

数据表下载