LPC2917 datasheet(22/68 Pages) PHILIPS

22 / 68 page

LPC2917_19_1

Preliminary data sheet

Rev. 1.01 — 15 November 2007

22 of 68

NXP Semiconductors

LPC2917/19

ARM9 microcontroller with CAN and LIN

8.3 General subsystem

8.3.1 General subsystem clock description

The general subsystem is clocked by CLK_SYS_GESS, see Section 7.2.2.

8.3.2 Chip and feature identification

8.3.2.1

Overview

The key features are:

• Identification of product

• Identification of features enabled

8.3.2.2

Description

The Chip/Feature ID (CFID) module contains registers which show and control the

functionality of the chip. It contains an ID to identify the silicon, and also registers

containing information about the features enabled or disabled on the chip.

8.3.2.3

CFID pin description

The CFID has no external pins.

8.3.3 System Control Unit (SCU)

8.3.3.1

Overview

The system control unit takes care of system-related functions.The key feature is

configuration of the I/O port-pins multiplexer.

8.3.3.2

Description

The system control unit defines the function of each I/O pin of the LPC2917/19. The I/O

pin configuration should be consistent with peripheral function usage.

8.3.3.3

SCU pin description

The SCU has no external pins.

8.3.4 Event router

8.3.4.1

Overview

The event router provides bus-controlled routing of input events to the vectored interrupt

controller for use as interrupt or wake-up signals.

Key features:

• Up to 24 level-sensitive external interrupt pins, including CAN, LIN and RxD wake-up

features plus three internal event sources

• Input events can be used as interrupt source either directly or latched (edge-detected)

• Direct events disappear when the event becomes inactive

• Latched events remain active until they are explicitly cleared

• Programmable input level and edge polarity

• Event detection maskable

LPC2917 数据表(PDF) 22 Page - NXP Semiconductors

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