ST52F510 datasheet(65/106 Pages) STMICROELECTRONICS

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ST52F510/F513/F514

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10 10-BIT A/D CONVERTER

10.1 Introduction

ST52F510/F513/F514 A/D Converter is a 10-bit

analog to digital converter with up to 8 analog

inputs.

The

A/D

converter

offers

typical

conversion time of 10

µs in fast mode and of 20 µs

in slow mode. This period also includes the time of

the integral Sample and Hold circuitry, which

minimizes the need for external components and

allows quick sampling of the signal for the

minimum warping effect and integral conversion

error.

In addition the peripheral performs a calibration

procedure in order to get the maximum precision

allowed in the data of conversion. The calibration

procedure is performed in two phases: the pre-

charging phase and the tuning phase. The pre-

charging process can be executed, after the

peripheral start, to set-up the internal references

and to speed-up the tuning process. The tuning

process

carried-out

during

the

channels

conversion.

Note: The user must be take in account both the

pre-charging time and some dummy conversion (at

least 20) for the tuning before starting the data

acquisition. It is recommended to repeat this

procedure at the start-up and after a long time

peripheral stop.

Figure 10.1 A/D Converter Structure

The pre-charging process starts by starting the

peripheral by setting to 1 the STR bit of the AD_CR

Configuration

speed-up

the

calibration procedure, the pre-charging phase can

be skipped when not necessary (for example when

consecutive single conversions are performed).

The user can disable the pre-charging by setting

the PRECH bit in the AD_CR Configuration

The A/D peripheral converts the input voltage with

a process of successive approximations using a

fixed clock frequency derived from the 10 MHz

internal oscillator, divided by a factor that depends

on the speed mode: about 1.6 MHz in Fast Mode

and 800 kHz in Slow Mode. The speed mode is

chosen by the SCK bit of the AD_CR Configuration

The conversion range is found between the analog

VSS and the A/D VREF references. The VREF can

be either internal, derived from the VDD, or external

by using the VREF pin. The external reference

voltage allows the application of more precise and

stable reference voltages. The two modes are

selected by using the REF bit of the AD_CR

Configuration Register.

Remark: the voltage applied to the VREF pin must

be in the range VSS-VDD.

The external reference voltage VREF is applied to

the analog pin PB0. This pin shares the alternate

functions with the first analog channel Ain0: if the

CONFIGURATION REGISTERS

CONTROL

LOGIC

ANALOG

MUX

Ain0

Ain1

Ain2

Ain3

Ain4

Ain5

Ain6

Ain7

VREF

VDD

AUTO-ZERO /

AUTO-CALIBRATION

COMPARATOR

SUCCESSIVE

APPROXIMATION

SAMPLE

HOLD

DAC

RESISTIVE

REFERENCE

LADDER

MSB

LSB

MSB

LSB

MSB

LSB

MSB

LSB

MSB

LSB

MSB

LSB

MSB

LSB

MSB

LSB

STATUS REGISTER

INPUT REGISTERS

REF

SUCCESSIVE APPROXIMATION A/D CONVERTER

INT1

REF

CH0

CH1

CH2

: 6

: 12

Internal

Oscillator

10 MHz

A/D

clock

SCK

SEQ

POW

STR

CONT

INT0

RESOL

PRECH

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