ST52F510 datasheet(84/106 Pages) STMICROELECTRONICS

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ST52F510/F513/F514

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13.4 SCI Register Description

The following registers are related to the use of the

SCI peripheral.

13.4.1 SCI Configuration Registers.

SCI Control Register 1 (SCI_CR1)

Configuration Register 22 (016h) Read/Write

Reset Value: 0000 0000 (00h)

Bit 7: RXFINT SCDR_RX buffer full interrupt mask

0: interrupt disabled

1: interrupt enabled

Bit 6: OVRINT Overrun interrupt mask

0: interrupt disabled

1: interrupt enabled

Bit 5: BRKINT Break interrupt mask

0: interrupt disabled

1: interrupt enabled

Bit 4: TXEMINT SCDR_TX buffer empty interrupt

0: interrupt disabled

1: interrupt enabled

Bit 3: TXENINT TX end interrupt mask

0: interrupt disabled

1: interrupt enabled

Bit 2: PAR/T8 Parity type selection or TX 9th bit

0: parity odd if enabled, else TX 9th bit=0

1: parity even if enabled, else TX 9th bit=1

Bit 1-0: FRM Frame type selection

00: 8 bit, no parity, 1 stop bit

01: 8 bit, no parity, 2 stop bit

10: 8 bit, parity, 1 stop bit

11: 9 bit, no parity, 1 stop bit

Note: the SCI interrupts are not enabled unless the

bit 3 (MSKSCI) of the Configuration Register 0

(INT_MASK) is enabled (set to 1).

SCI Control Register 2 (SCI_CR2)

Configuration Register 23 (017h) Read/Write

Reset Value: 0000 0000 (00h)

Bit 7-4: PRESC_H Baud Rate prescaler (bit 11:8)

These bits are the higher part of the

prescaler (see SCI_CR3 Configuration

of the communication, according to Table

13.1 and Table 13.2, as explained in

Paragraph 13.3.

Bit 3-2: not used

Bit 1: RXSTRT Reception enable

0: RX disabled

1: RX enabled

Bit 0: TXSTRT Transmission enable

0: TX disabled

1: TX enabled

SCI Control Register 3 (SCI_CR3)

Configuration Register 43 (02Bh) Read/Write

Reset Value: 0000 0000 (00h)

Bit 7-0: PRESC_L Baud Rate prescaler (bit 7:0)

These bits are the lower part of the

prescaler (see SCI_CR2 Configuration

of the communication, according to Table

13.1 and Table 13.2, as explained in

Paragraph 13.3.

RXFINT OVRINT BRKINT TXEMINT TXENINT PAR/T8

FRM

PRESC_H

RXSTRT TXSTRT

PRESC_L

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