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ST52F510 数据表(PDF) 44 Page - STMicroelectronics |
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ST52F510 数据表(HTML) 44 Page - STMicroelectronics |
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44 / 106 page  ST52F510/F513/F514 44/106 6 CLOCK, RESET & POWER SAVING MODES 6.1 Clock The ST52F510/F513/F514 Clock Generator module generates the internal clock for the internal Control Unit, ALU and on-chip peripherals. The Clock is designed to require a minimum of external components. ST52F510/F513/F514 devices supply the internal oscillator in four clock modes: s External oscillator s External clock s External RC oscillator s Internal clock The device always starts in internal clock mode, excluding any external clock source. After the start-up phase the clock is configured according to the user definition programmed in the Option Byte 0 (OSC_CR). The internal clock generator can supply an internal clock signal with a fixed frequency of 10 MHz ± 1%, without the need for external components. In order to obtain the maximum accuracy, the frequency can be calibrated by configuring the related Option byte 2 (OSC_SET). The external oscillator mode uses a quartz crystal or a ceramic resonator connected to OSCin and OSCout as illustrated in Figure 6.1. This figure also illustrates the connection of an external clock. The ST52F510/F513/F514 oscillator circuit generates an internal clock signal with the same period and phase as the OSCIN input pin. The maximum frequency allowed is 24 MHz. When the external oscillator is used, the loop gain can be adapted to the various frequencies values by configuring the three bits of the Option Byte 1 CLK_SET (see Register Decription, Table 6.2). When an external clock is used, it must be connected to the pin OSCIN while OSCOUT can be floating. In this case, Option Byte 1 bits must be written with 0 (000). The crystal oscillator start-up time is a function of many variables: crystal parameters (especially Rs), oscillator load capacitance (CL), IC parameters, environment temperature and supply voltage. The crystal or ceramic leads and circuit connections must be as short as possible. Typical values for CL1, CL2 are 10pF for a 20 MHz crystal. The clock signal can also be generated by an external RC circuit offering additional cost savings. Figure 6.1 illustrates the possible connections. Frequency is a function of resistor, capacitance, supply voltage and operating temperature; some indicative values when Vdd=5V and T=25°, are shown in Table 6.1. The clock signal generates two internal clock signals: one for the CPU and one for the peripherals. The CPU clock frequency can be reduced, in order to decrease current consuption, by setting the CPU_CLK Configuration Register 46 (02Eh). The CPU clock can be reduced up to 64 times (see Register Description). Figure 6.1 Oscillator Connections OSCin OSCout ST FIVE OSCin ST FIVE OSCout CRYSTAL CLOCK EXTERNAL CLOCK Cl1 10pF Cl2 10pF CLOCK INPUT OSCin ST FIVE OSCout RC CIRCUIT CLOCK Vdd Vss RC Table 6.1 RC Oscillator indicative frequencies C (pF) R( Ω) fosc (KHz) Variation 20 pF 9.5K 5000 6.6% 10K 4870 7.1% 20K 3000 5.3% 50K 1360 3.3% 100K 724 2.8% 100 pF 10K 1720 7.5% 20K 926 8% 50K 424 11.2% 100K 248 15% |
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