R8CSLASH2G datasheet(70/344 Pages) RENESAS

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R8C/2G Group

7. Comparator

Rev.1.00

Apr 04, 2008

Page 50 of 318

REJ09B0387-0100

Figure 7.4

VW1C Register

Voltage Monitor 1 Circuit Control Register (1)

Symbol

Address

After Reset(2)

VW1C

0036h

00001010b

Bit Symbol

Bit Name

Function

NOTES:

[Source for setting this bit to 0]

0: Write 0

[Source for setting this bit to 0]

1: When interrupt request is generated

b1 b0

b7 b6 b5 b4

VW1C0

Comparator 1 interrupt enable bit(3) 0: Disable

1: Enable

0: Digital filter enable mode

(digital filter circuit enabled)

1: Digital filter disable mode

(digital filter circuit disabled)

VW1C2

Comparator 1 interrupt

flag(2, 5, 6)

VW1C1

Comparator 1 digital filter disable

mode select bit(4)

VW1C3

Comparator 1 signal monitor

flag(2, 5)

VW1F1

Sampling clock select bits

b5 b4

0 0: fOCO-S divided by 1

0 1: fOCO-S divided by 2

1 0: fOCO-S divided by 4

1 1: fOCO-S divided by 8

VW1F0

0: VCMP1 < reference voltage

1: VCMP1 ≥ reference voltage or

comparator 1 circuit disabled

VW1C6

Reserved bit

Set to 0.

VW1C7

Comparator 1 interrupt generation

condition select bit(7)

0: When VCMP1 reaches reference

voltage or above

1: When VCMP1 reaches reference

voltage or below

Bits VW1C2 and VW1C3 are enabled w hen the VCA26 bit in the VCA2 register is set to 1 (comparator 1 circuit

enabled).

Set this bit to 0 by a program. When 0 is w ritten by a program, it is set to 0 (and remains unchanged even if 1 is

w ritten to it).

The VW1C7 bit is enabled w hen the VCAC1 bit in the VCAC register is set to 0 (one edge). Set the VW1C7 bit after

setting the VCAC1 bit to 0.

Set the PRC3 bit in the PRCR register to 1 (w rite enabled) before rew riting the VW1C register.

When the VW1C register is rew ritten, the VW1C2 bit may be set to 1. Set the VW1C2 bit to 0 after rew riting the

VW1C register.

Bits VW1C2 and VW1C3 remain unchanged after a softw are reset or w atchdog timer reset.

The VW1C0 is enabled w hen the VCA26 bit in the VCA2 register is set to 1 (comparator 1 circuit enabled).

When the VCA26 bit is set to 0 (comparator 1 circuit disabled), set the VW1C0 bit to 0 (disable).

To set the VW1C0 bit to 1 (enable), follow the procedure show n in Table 7.3 Procedure for Setting Bits

Associated w ith Com parator 1 Interrupt.

To use the comparator 1 interrupt to exit stop mode and to return again, w rite 1 to the VW1C1 bit after w riting 0.

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