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R8C/2G 数据表(PDF) 89 Page - Renesas Technology Corp |
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R8C/2G 数据表(HTML) 89 Page - Renesas Technology Corp |
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89 / 344 page ![]() R8C/2G Group 8. I/O Ports Rev.1.00 Apr 04, 2008 Page 69 of 318 REJ09B0387-0100 Figure 8.3 Configuration of I/O Ports (3) P4_3/XCIN Data bus Pull-up selection P4_4/XCOUT Data bus Clocked inverter(2) (Note 3) NOTES: 1. symbolizes a parasitic diode. Ensure the input voltage to each port does not exceed VCC. 2. When CM10 = 1 or CM04 = 0, the clocked inverter is cut off. 3. When CM04 = 0 the feedback resistor is disconnected. Port latch Port latch (Note 1) (Note 1) (Note 1) (Note 1) Direction register Direction register P1_5 and P1_7 Data bus Pull-up selection Input to individual peripheral function 1 Output from individual peripheral function INT1 input Digital filter Direction register (Note 1) (Note 1) Port latch |
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