R8CSLASH2G datasheet(203/344 Pages) RENESAS

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R8C/2G Group

17. Timers

Rev.1.00

Apr 04, 2008

Page 183 of 318

REJ09B0387-0100

17.3.1

Real-Time Clock Mode

In real-time clock mode, a 1-second signal is generated from fC4 using a divide-by-2 frequency divider, 4-bit

counter, and 8-bit counter and used to count seconds, minutes, hours, and days of the week. Figure 17.26 shows

a Block Diagram of Real-Time Clock Mode and Table 17.11 lists the Real-Time Clock Mode Specifications.

Figures 17.27 to 17.31 and 17.33 to 17.35 show the Registers Associated with Real-Time Clock Mode. Table

17.12 lists the Interrupt Sources, Figure 17.32 shows the Definition of Time Representation and Figure 17.36

shows the Operating Example in Real-Time Clock Mode.

Figure 17.26

Block Diagram of Real-Time Clock Mode

TREWK

TREHR

TREMIN

TRESEC

H12_H24

bit

MNIE

HRIE

WKIE

000

DYIE

SEIE

Timer RE

interrupt

INT

bit

BSY

bit

Overflow

Timing

control

Data bus

Overflow

(1s) Overflow

(1/256)

(1/16)

fC4

(8.192kHz)

RCS6 to RCS4

= 000b

= 010b

= 100b

= 011b

TOENA

= 001b

8-bit counter

4-bit counter

1/2

TOENA, H12_H24, PM, INT: Bits in TRECR1 register

SEIE, MNIE, HRIE, DYIE, WKIE: Bits in TRECR2 register

BSY: Bit in TRESEC, TREMIN, TREHR, TREWK register

RCS4 to RCS6: Bits in TRECSR register

TREOSEL: Bit in PINSR3 register

TREOSEL2: Bit in PINSR4 register

PLUS

MIN US

Data

(D5 to D0)

TREO (P6_0)

TREOSEL=1

TREOSEL=0

TREO (P0_4)

TREOSEL2=0

TREO (P6_5)

TREOSEL2=1

TREOPR

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