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H8S/2218 数据表(PDF) 383 Page - Renesas Technology Corp

部件名 H8S/2218
功能描述  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  750 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S/2218 数据表(HTML) 383 Page - Renesas Technology Corp

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Section 9 16-Bit Timer Pulse Unit (TPU)
Rev.6.00 Jun. 03, 2008 Page 335 of 698
REJ09B0074-0600
Contention between TGR Write and Input Capture: If the input capture signal is generated in
the T2 state of a TGR write cycle, the input capture operation takes precedence and the write to
TGR is not performed. Figure 9.50 shows the timing in this case.
Input capture
signal
Write signal
Address
φ
TCNT
TGR write cycle
T
1
T
2
M
TGR
M
TGR address
Figure 9.50 Contention between TGR Write and Input Capture



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