H8SSLASH2218 datasheet(519/750 Pages) RENESAS

519 / 750 page

Section 14 Universal Serial Bus (USB)

Rev.6.00 Jun. 03, 2008 Page 471 of 698

REJ09B0074-0600

14.3.2

USB DMAC Transfer Request Register (UDMAR)

UDMAR is set when data transfer by means of a USB request of the on-chip DMAC is performed

for data registers UEDR1 and UEDR2 corresponding to EP1 and EP2 respectively used for Bulk

transfer. For the DMAC transfer, set

DREQ0 and DREQ1 separately. If DREQ0 and DREQ1

usage overlaps, the USB cannot operate correctly. For details on DMAC transfer, refer to section

14.6, DMA Transfer Specifications.

Note:

As the

DREQ signal is not used in the data transfer by auto request of the on-chip DMAC,

set UDMAR to H'00.

Bit

Bit Name

Initial Value

R/W

Description

7 to 4 —

All 0

Reserved

These bits are always read as 0 and cannot be

modified.

EP2T1

EP2T0

R/W

EP2 DMAC Transfer Request Select 1, 0

00: Does not request EP2 DMAC transfer

01: Reserved

10: Requests EP2 DMAC transfer by

DREQ0

11: Requests EP2 DMAC transfer by

DREQ1

EP1T1

EP1T0

R/W

EP1 DMAC Transfer Request Select 1, 0

00: Does not request EP1 DMAC transfer

01: Reserved

10: Requests EP1 DMAC transfer by

DREQ0

11: Requests EP1 DMAC transfer by

DREQ1

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