H8SSLASH2218 datasheet(647/750 Pages) RENESAS

647 / 750 page

Section 19 Clock Pulse Generator

Rev.6.00 Jun. 03, 2008 Page 599 of 698

REJ09B0074-0600

Bit

Bit Name Initial Value R/W

Description

RFCUT

R/W

Built-in Feedback Resistor Control

Selects whether the oscillator’s built-in feedback resistor

and duty adjustment circuit are used with external clock

input. This bit should not be accessed when a crystal

oscillator is used.

After this bit is set when using external clock input, a

transition should initially be made to software standby

mode. Switching between use and non-use of the

oscillator’s built-in feedback resistor and duty adjustment

circuit is performed when the transition is made to software

standby mode.

0: Main clock oscillator’s built-in feedback resistor and duty

adjustment circuit are used

1: Main clock oscillator’s built-in feedback resistor and duty

adjustment circuit are not used

⎯

R/W

Reserved

This bit can be read from or written to, but the write value

should always 0.

STC1

STC0

R/W

Frequency Multiplication Factor

Specify the frequency multiplication factor of the PLL circuit

incorporated into the evaluation chip. The specified

frequency multiplication factor is valid after a transition to

software standby mode.

With this LSI, the STC1 and STC0 bits must both be set to

1. After a reset, the STC1 and STC0 bits are both cleared

to 0, and so they must be set to 1.

00:

× 1

01:

× 2 (Setting prohibited)

10:

× 4 (Setting prohibited)

11: PLL is bypassed

Note: * When watch mode or subactive mode is entered, set high-speed mode.

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