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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8S/2218 数据表(PDF) 113 Page - Renesas Technology Corp |
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H8S/2218 数据表(HTML) 113 Page - Renesas Technology Corp |
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113 / 750 page  Section 2 CPU Rev.6.00 Jun. 03, 2008 Page 65 of 698 REJ09B0074-0600 Exception handling state Bus-released state Hardware standby mode* 2 Software standby mode Reset state* 1 Sleep mode Power-down state* 3 Program execution state End of bus request Bus request Interrupt request External interrupt request RES = High MRES = High STBY = High, RES = Low End of bus request Bus request SLEEP instruction, SSBY = 0 SLEEP instruction, SSBY = 1 Notes: 1. 2. 3. From any state except hardware standby mode, a transition to the reset state occurs whenever RES goes low. A transition can also be made to the reset state when the watchdog timer overflows. From any state except hardware standby mode and power-on reset state, a transition to the manual reset state occurs whenever MRES goes low. From any state, a transition to hardware standby mode occurs when STBY goes low. Apart from these states, there are also the watch mode, subactive mode, and the subsleep mode. See section 20, Power-Down Modes. Figure 2.13 State Transitions |
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