H8SSLASH2218 datasheet(114/750 Pages) RENESAS

114 / 750 page

Section 2 CPU

Rev.6.00 Jun. 03, 2008 Page 66 of 698

REJ09B0074-0600

2.9

Usage Notes

2.9.1

Note on TAS Instruction Usage

Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction. The TAS

instruction is not generated by the Renesas Technology H8S and H8/300 Series C/C++ compilers.

If the TAS instruction is used as a user-defined intrinsic function, ensure that only register ER0,

ER1, ER4, or ER5 is used.

2.9.2

STM/LTM Instruction Usage

With the STM or LDM instruction, the ER7 register is used as the stack pointer, and thus cannot

be used as a register that allows save (STM) or restore (LDM) operation.

With a single STM or LDM instruction, two to four registers can be saved or restored. The

available registers are as follows:

For two registers: ER0 and ER1, ER2 and ER3, or ER4 and ER5

For three registers: ER0 to ER2, or ER4 to ER6

For four registers: ER0 to ER3

For the Renesas Technology H8S or H8/300 Series C/C++ Compiler, the STM/LDM instruction

including ER7 is not created.

2.9.3

Note on Bit Manipulation Instructions

Using bit manipulation instructions on registers containing write-only bits can result in the bits that

should have been manipulated not being manipulated as intended or in the wrong bits being

manipulated.

Reading data from a register containing write-only bits may return fixed or undefined values.

Consequently, bit manipulation instructions that use the read values to perform operations (BNOT,

BTST, BAND, BIAND, BOR, BIOR, BXOR, BIXOR, BLD, and BILD) will not work properly.

In addition, bit manipulation instructions that write data following operations based on the data

values read (BSET, BCLR, BNOT, BST, and BIST) may change the values of bits unrelated to the

intended bit manipulation. Therefore, caution is necessary when using bit manipulation

instructions on registers containing write-only bits.

H8S/2218 数据表(PDF) 114 Page - Renesas Technology Corp