| 数据搜索系统,热门电子元器件搜索 |
|
H8S/2218 数据表(PDF) 252 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
H8S/2218 数据表(HTML) 252 Page - Renesas Technology Corp |
|
252 / 750 page ![]() Section 7 DMA Controller (DMAC) Rev.6.00 Jun. 03, 2008 Page 204 of 698 REJ09B0074-0600 Resumption of transfer on interrupted channel Set DTME bit to 1 Transfer continues [1] [2] DTE = 1 DTME = 0 Transfer ends No Yes [1] [2] Check that DTE = 1 and DTME = 0 in DMABCRL Write 1 to the DTME bit. Figure 7.21 Example of Procedure for Continuing Transfer on Channel Interrupted by NMI Interrupt 7.4.13 Forced Termination of DMAC Operation If the DTE bit for the channel currently operating is cleared to 0, the DMAC stops on completion of the 1-byte or 1-word transfer in progress. DMAC operation resumes when the DTE bit is set to 1 again. In full address mode, the same applies to the DTME bit. Figure 7.22 shows the procedure for forcibly terminating DMAC operation by software. Forced termination of DMAC Clear DTE bit to 0 Forced termination [1] [1] Clear the DTE bit in DMABCRL to 0. If you want to prevent interrupt generation after forced termination of DMAC operation, clear the DTIE bit to 0 at the same time. Figure 7.22 Example of Procedure for Forcibly Terminating DMAC Operation |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |