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H8S/2225 数据表(PDF) 533 Page - Renesas Technology Corp

部件名 H8S/2225
功能描述  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  1071 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S/2225 数据表(HTML) 533 Page - Renesas Technology Corp

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Section 12 8-Bit Timers
Rev. 5.00 Aug 08, 2006 page 447 of 982
REJ09B0054-0500
12.3.5
Timer Control/Status Register (TCSR)
TCSR indicates status flags and controls compare-match output.
• TCSR_0
Bit
Bit Name
Initial
Value
R/W
Description
7CMFB
0
R/(W)*
Compare-Match Flag B
[Setting condition]
When TCNT = TCORB
[Clearing conditions]
• Read CMFB when CMFB = 1, then write 0 in
CMFB
• When DTC is activated by CMIB interrupt while
DISEL bit of MRB in DTC is 0 with the transfer
counter not being 0
6CMFA
0
R/(W)*
Compare-Match Flag A
[Setting condition]
When TCNT = TCORA
[Clearing conditions]
• Read CMFA when CMFA = 1, then write 0 in
CMFA
• When DTC is activated by CMIA interrupt while
DISEL bit of MRB in DTC is 0 with the transfer
counter not being 0
5OVF
0
R/(W)*
Timer Overflow Flag
[Setting condition]
When TCNT overflows from H'FF to H'00
[Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF
4
ADTE
0
R/W
A/D Trigger Enable
Enables or disables A/D converter start requests by
compare-match A.
0: A/D converter start requests by compare-match A
are disabled
1: A/D converter start requests by compare-match A
are enabled



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