H8SSLASH2225 datasheet(738/1071 Pages) RENESAS

738 / 1071 page

Section 16 I

2C Bus Interface (IIC) (Option)

Rev. 5.00 Aug 08, 2006 page 652 of 982

REJ09B0054-0500

Bit

Bit Name

Initial

Value

R/W

Description

ACKB

R/W

Acknowledge Bit

Stores acknowledge data.

Transmit mode:

[Setting condition]

When 1 is received as the acknowledge bit when ACKE = 1

in transmit mode

[Clearing conditions]

• When 0 is received as the acknowledge bit when ACKE

= 1 in transmit mode

• When 0 is written to the ACKE bit

Receive mode:

0: Returns 0 as acknowledge data after data reception

1: Returns 1 as acknowledge data after data reception

When this bit is read, the value loaded from the bus line

(returned by the receiving device) is read in transmission

(when TRS = 1). In reception (when TRS = 0), the value set

by internal software is read.

When this bit is written, acknowledge data that is returned

after receiving is rewritten regardless of the TRS value. If bit

in ICSR is written using bit-manipulation instructions, the

acknowledge data should be re-set since the acknowledge

data setting is rewritten by the ACKB bit reading value.

Write the ACKE bit to 0 to clear the ACKB flag to 0, before

transmission is ended and a stop condition is issued in

master mode, or before transmission is ended and SDA is

released to issue a stop condition by a master device.

Note:

* Only a 0 can be written to this bit, to clear the flag.

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