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H8S/2225 数据表(PDF) 793 Page - Renesas Technology Corp |
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H8S/2225 数据表(HTML) 793 Page - Renesas Technology Corp |
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793 / 1071 page ![]() Section 18 D/A Converter Rev. 5.00 Aug 08, 2006 page 707 of 982 REJ09B0054-0500 Section 18 D/A Converter 18.1 Features • 8-bit resolution • Two output channels • Conversion time: 10 µs, maximum (when load capacitance is 20 pF) • Output voltage: 0 V to Vref • Module stop mode can be set Note: The D/A converter is not included in the H8S/2227 Group. Module data bus Internal data bus Vref AVCC DA1 DA0 AVSS 8-bit D/A Control circuit Legend: DACR: D/A control register DADR0: D/A data register 0 DADR1: D/A data register 1 Figure 18.1 Block Diagram of D/A Converter DAC0004C_000020020700 |
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