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H8S/2225 数据表(PDF) 791 Page - Renesas Technology Corp |
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H8S/2225 数据表(HTML) 791 Page - Renesas Technology Corp |
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791 / 1071 page ![]() Section 17 A/D Converter Rev. 5.00 Aug 08, 2006 page 705 of 982 REJ09B0054-0500 17.8.4 Range of Analog Power Supply and Other Pin Settings If the conditions below are not met, the reliability of the device may be adversely affected. • Analog input voltage range The voltage applied to analog input pin ANn during A/D conversion should be in the range AVss ≤ ANn ≤ AVcc. • Relationship between AVcc, AVss and Vcc, Vss Set AVss = Vss as the relationship between AVcc, AVss and Vcc, Vss. If the A/D converter is not used, the AVcc and AVss pins must not be left open. • Vref range The reference voltage input from the Vref pin should be set to AVcc or less. 17.8.5 Notes on Board Design In board design, digital circuitry and analog circuitry should be as mutually isolated as possible, and layout in which digital circuit signal lines and analog circuit signal lines cross or are in close proximity should be avoided as far as possible. Failure to do so may result in incorrect operation of the analog circuitry due to inductance, adversely affecting A/D conversion values. Also, digital circuitry must be isolated from the analog input signals (AN0 to AN7), and analog power supply (AVcc) by the analog ground (AVss). Also, the analog ground (AVss) should be connected at one point to a stable digital ground (Vss) on the board. 17.8.6 Notes on Noise Countermeasures A protection circuit should be connected in order to prevent damage due to abnormal voltage, such as an excessive surge at the analog input pins (AN0 to AN7), between AVcc and AVss, as shown in figure 17.10. Also, the bypass capacitors connected to AVcc and the filter capacitor connected to AN0 to AN7 must be connected to AVss. If a filter capacitor is connected, the input currents at the analog input pins (AN0 to AN7) are averaged, and so an error may arise. Also, when A/D conversion is performed frequently, as in scan mode, if the current charged and discharged by the capacitance of the sample-and-hold circuit in the A/D converter exceeds the current input via the input impedance (Rin), an error will arise in the analog input pin voltage. Careful consideration is therefore required when deciding circuit constants. |
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