 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
H8S/2225 数据表(PDF) 941 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
H8S/2225 数据表(HTML) 941 Page - Renesas Technology Corp |
|
|
941 / 1071 page  Section 27 Electrical Characteristics Rev. 5.00 Aug 08, 2006 page 855 of 982 REJ09B0054-0500 (2) Control Signal Timing Table 27.6 lists the control signal timing. Table 27.6 Control Signal Timing Condition A: VCC = 4.0 V to 5.5 V, AVCC = 4.0 V to 5.5 V, Vref = 4.0 V to AVCC, VSS = AVSS = 0 V, φ = 32.768 kHz, 10 to 13.5 MHz, Ta = –20°C to +75°C (regular specifications), Ta = –40°C to +85°C (wide-range specifications) Condition A Item Symbol Min Min Unit Test Conditions RES setup time tRESS 250 ns RES pulse width tRESW 20 tcyc MRES setup time tMRESS 250 ns MRES pulse width tMRESW 20 tcyc Figure 27.12 NMI setup time tNMIS 250 ns NMI hold time tNMIH 10 ns NMI pulse width (exiting software standby mode) tNMIW 200 ns IRQ setup time tIRQS 250 ns IRQ hold time tIRQH 10 ns IRQ pulse width (exiting software standby mode) tIRQW 200 ns Figure 27.13 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
