H8SSLASH2225 datasheet(220/1071 Pages) RENESAS

部件名	H8S/2225

功能描述	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	1071 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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220 / 1071 page

Section 5 Interrupt Controller

Rev. 5.00 Aug 08, 2006 page 134 of 982

REJ09B0054-0500

5.3.4

IRQ Status Register (ISR)

ISR indicates the status of IRQn (n = 7 to 0) interrupt requests.

Bit

Bit Name

Initial

Value

R/W

Description

IRQ7F

IRQ6F

IRQ5F

IRQ4F

IRQ3F

IRQ2F

IRQ1F

IRQ0F

R/W*

IRQ7 to IRQ0 Flags

Indicates the status of IRQ7 to IRQ0 interrupt requests.

[Setting condition]

When the interrupt source selected by the ISCRH, or

ISCRL occurs

[Clearing conditions]

• Cleared by reading IRQnF flag when IRQnF = 1, then

writing 0 to IRQnF flag

• When interrupt exception handling is executed when

low-level detection is set and

IRQn input is high level

• When IRQn interrupt exception handling is executed

when falling, rising, or both-edge detection is set

• When the DTC is activated by an IRQn interrupt, and

the DISEL bit in MRB of the DTC is cleared to 0

Note:

* Only 0 can be written to this bit to clear the flag.

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