H8SSLASH2225 datasheet(301/1071 Pages) RENESAS

部件名	H8S/2225

功能描述	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	1071 Pages

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制造商	RENESAS [Renesas Technology Corp]

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Section 8 DMA Controller (DMAC)

Rev. 5.00 Aug 08, 2006 page 215 of 982

REJ09B0054-0500

• DMACR_0B and DMACR_1B

Bit

Bit Name

Initial Value

R/W

Description



0R/W

Reserved

This bit can be read from or written to.

However, the write value should always be 0.

DAID

DAIDE

R/W

Destination Address Increment/Decrement

Enable

These bits specify whether destination address

decremented, or left unchanged, when data

transfer is performed.

00: MARB is fixed

01: MARB is incremented after a data transfer

• When DTSZ = 0, MARB is incremented by

• When DTSZ = 1, MARB is incremented by

10: MARB is fixed

11: MARB is decremented after a data transfer

• When DTSZ = 0, MARB is decremented by

• When DTSZ = 1, MARB is decremented by

4—

R/W

Reserved

This bit can be read from or written to.

However, the write value should always be 0.

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