H8SLASH3003 datasheet(165/715 Pages) RENESAS

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Address Multiplexing: Address multiplexing depends on the setting of the M9/

M8 bit in

RFSHCR, as described in table 7-5. Figure 7-4 shows the address output timing. Address output is

multiplexed only in area 3.

Table 7-5 Address Multiplexing

Address Pins

A23 to A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

Address signals during row

A23 to A10 A9

address output

M9/

M8 = 0 A23 to A10 A9 A9 A16 A15 A14 A13 A12 A11 A10 A0

M9/

M8 = 1 A23 to A10 A18 A17 A16 A15 A14 A13 A12 A11 A10 A0

Figure 7-4 Multiplexed Address Output (Example without Wait States)

Address signals during

column address output

to A , A

A to A

Row address

to A

Column address

to A , A

Address

bus

to A , A

A to A

Row address

to A

Column address

to A , A

Address

bus

a. M9/

= 0

b. M9/

= 1

147

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