H8SLASH3003 datasheet(328/715 Pages) RENESAS

328 / 715 page

Bits 2 to 0—Timer Prescaler 2 to 0 (TPSC2 to TPSC0): These bits select the counter clock

source.

Bit 2

Bit 1

Bit 0

TPSC2

TPSC1

TPSC0

Function

Internal clock: ø

(Initial value)

Internal clock: ø/2

Internal clock: ø/4

Internal clock: ø/8

External clock A: TCLKA input

External clock B: TCLKB input

External clock C: TCLKC input

External clock D: TCLKD input

When bit TPSC2 is cleared to 0 an internal clock source is selected, and the timer counts only

falling edges. When bit TPSC2 is set to 1 an external clock source is selected, and the timer counts

the edge or edges selected by bits CKEG1 and CKEG0.

When channel 2 is set to phase counting mode (MDF = 1 in TMDR), the settings of bits TPSC2 to

TPSC0 in TCR2 are ignored. Phase counting takes precedence.

10.2.11 Timer I/O Control Register (TIOR)

TIOR is an 8-bit register. The ITU has five TIORs, one in each channel.

Channel

Abbreviation

Function

TIOR0

TIOR1

TIOR2

TIOR3

TIOR4

TIOR controls the general registers. Some functions differ in PWM

mode. TIOR3 and TIOR4 settings are ignored when complementary

PWM mode or reset-synchronized PWM mode is selected in

channels 3 and 4.

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H8/3003 数据表(PDF) 328 Page - Renesas Technology Corp

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