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EM357-RTR 数据表(PDF) 177 Page - List of Unclassifed Manufacturers |
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EM357-RTR 数据表(HTML) 177 Page - List of Unclassifed Manufacturers |
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177 / 240 page ![]() EM351 / EM357 If interrupts will be used, configure the top-level and second-level ADC interrupt bits. Write the ADC configuration register to define the inputs, voltage range, sample time, and start the conversions. 10.1.1 GPIO Usage A GPIO pin used by the ADC as an input or voltage reference must be configured in analog mode by writing 0 to its 4-bit field in the proper GPIO_PxCFGH/L register. Note that a GPIO pin in analog mode cannot be used for any digital functions, and GPIO_PxIN always reads it as 1. Only certain pins can be configured in analog mode, these are listed in Table 10-1. Table 10-1. ADC GPIO Pin Usage Analog Signal GPIO Configuration control ADC0 input PB5 GPIO_PBCFGH[7:4] ADC1 input PB6 GPIO_PBCFGH[11:8] ADC2 input PB7 GPIO_PBCFGH[15:12] ADC3 input PC1 GPIO_PCCFGL[7:4] ADC4 input PA4 GPIO_PACFGH[3:0] ADC5 input PA5 GPIO_PACFGH[7:4] VREF input or output PB0 GPIO_PBCFGL[3:0] See Chapter 7, GPIO for more information about how to configure GPIO. 10.1.2 Voltage Reference The ADC voltage reference (VREF), may be internally generated or externally sourced from PB0. If internally generated, it may optionally be output on PB0. To output the internal VREF on PB0, the ADC must be enabled (ADC_ENABLE bit set in the ADC_CFG register) and PB0 must be configured in analog mode. To use an external reference, the Ember software must be called after reset and after waking from deep sleep. PB0 must also be configured in analog mode using GPIO_PBCFGH[3:0]. See the Ember software documentation for more information on using an external reference. 10.1.3 Offset/Gain Correction When a conversion is complete, the 16-bit converted data is processed in several steps by offset/gain correction hardware: 1. The initial signed ADC conversion result is added to the 16-bit signed (two’s complement) value of the ADC offset register (ADC_OFFSET). 2. The offset-corrected data is multiplied by the 16-bit ADC gain register, ADC_GAIN, to produce a 16-bit signed result. If the product is greater than 0x7FFF (32767), or less than 0x8000 (-32768), it is limited to that value and the INT_ADCSAT bit is set in the INT_ADCFLAG register. 3. The offset/gain corrected value is divided by two to produce the final result. ADC_GAIN is an unsigned scaled 16-bit value: ADC_GAIN[15] is the integer part of the gain factor and ADC_GAIN[14:0] is the fractional part. As a result, ADC_GAIN values can represent gain factors from 0 through (2 – 2-15). Although ADC_GAIN can represent a much greater range, its purpose is to correct small gain error, and in practice is loaded with values within a range of about 0.95 to 1.05. 10-2 120-035X-000D Preliminary |
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