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Integrated Graphics Device Registers (D2:F0)

(Intel® 82915G/82915GV/82915GL/ 82910GL GMCH Only)

Datasheet

173

Integrated Graphics Device

Registers (D2:F0)

(Intel

® 82915G/82915GV/82915GL/

82910GL GMCH Only)

Device 2 contains registers for the internal graphics functions. Table 9-1 lists the PCI

configuration registers in order of ascending offset address. Function 0 can be VGA compatible

or not, this is selected through bit 1 of GGC register (Device 0, offset 52h). The following

sections describe Device 2 PCI configuration registers only.

Table 9-1. Integrated Graphics Device Register Address Map (D2:F0)

Address

Offset

Symbol

Default

Value

Access

00–01h

VID2

Vendor Identification

8086h

02–03h

DID2

Device Identification

2582h

04–05h

PCICMD2

PCI Command

0000h

RO, R/W

06–07h

PCISTS2

PCI Status

0090h

08h

RID2

Revision Identification

See register

description

09–0Bh

Class Code

030000h

0Ch

CLS

Cache Line Size

00h

0Dh

MLT2

Master Latency Timer

00h

0Eh

HDR2

Header Type

80h

0Fh

—

Reserved

—

10–13h

MMADR

Memory Mapped Range Address

00000000h

RO, R/W

14–17h

IOBAR

I/O Base Address

00000001h

RO, R/W

18–1Bh

GMADR

Graphics Memory Range Address

00000008h

RO, R/W/L

1C–1Fh

GTTADR

Graphics Translation Table Range Address

00000000h

RO, R/W

20–2Bh

—

Reserved

—

2C–2Dh

SVID2

Subsystem Vendor Identification

0000h

R/WO

2E–2Fh

SID2

Subsystem Identification

0000h

R/WO

30–33h

ROMADR

Video BIOS ROM Base Address

00000000h

34h

CAPPOINT

Capabilities Pointer

D0h

35–3Bh

—

Reserved

—

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