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ADSP-BF504 数据表(PDF) 37 Page - Analog Devices

部件名 ADSP-BF504
功能描述  Blackfin Embedded Processor
PDF  80 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADSP-BF504 数据表(HTML) 37 Page - Analog Devices

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Preliminary Technical Data
Rev. PrC
|
Page 37 of 80
|
January 2010
ADSP-BF504/F,ADSP-BF506F
Table 27. RSI Controller Timing (High Speed Mode)
Parameter
Min
Max
Unit
Timing Requirements
tISU
Input Setup Time
5.6
ns
tIH
Input Hold Time
2
ns
Switching Characteristics
fPP
1
Clock Frequency Data Transfer Mode
0
50
MHz
tWL
Clock Low Time
9.5
ns
tWH
Clock High Time
9.5
ns
tTLH
Clock Rise Time
3ns
tTHL
Clock Fall Time
3ns
tODLY
Output Delay Time During Data Transfer Mode
TBD
ns
tOH
Output Hold Time
2.5
ns
1 t
PP = 1/fPP
Figure 17. RSI Controller Timing (High-Speed Mode)
SD_CLK
INPUT
OUTPUT
tISU
NOTES:
1 INPUT INCLUDES SD_Dx AND SD_CMD SIGNALS.
2 OUTPUT INCLUDES SD_Dx AND SD_CMD SIGNALS.
tTHL
tTLH
tWL
tWH
tPP
tIH
tODLY
tOH
VOH (MIN)
VOL (MAX)



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