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ADSP-BF504 数据表(PDF) 64 Page - Analog Devices

部件名 ADSP-BF504
功能描述  Blackfin Embedded Processor
PDF  80 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADSP-BF504 数据表(HTML) 64 Page - Analog Devices

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Rev. PrC
|
Page 64 of 80
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January 2010
ADSP-BF504/F,ADSP-BF506F
Preliminary Technical Data
supply using the 0 to VREF range or 2 × VREF range, respectively.
The common mode must be in this range to guarantee the func-
tionality of the ADC.
When a conversion takes place, the common mode is rejected,
resulting in a virtually noise free signal of amplitude –VREF to
+VREF corresponding to the digital codes of 0 to 4096. If the 2 ×
VREF range is used, then the input signal amplitude extends from
– 2 VREF to +2 VREF after conversion.
Driving Differential Inputs
Differential operation requires that VIN+ and VIN– be simulta-
neously driven with two equal signals that are 180° out of phase.
The common mode must be set up externally. The common-
mode range is determined by VREF, the power supply, and the
particular amplifier used to drive the analog inputs. Differential
modes of operation with either an ac or dc input provide the
best THD performance over a wide frequency range. Because
not all applications have a signal preconditioned for differential
operation, there is often a need to perform single-ended-to-dif-
ferential conversion.
Using an Op Amp Pair
An op amp pair can be used to directly couple a differential sig-
nal to one of the analog input pairs of the ADC. The circuit
configurations illustrated in Figure 78 (Dual Op Amp Circuit to
Convert a Single-Ended Unipolar Signal into a Differential Sig-
nal) and Figure 79 (Dual Op Amp Circuit to Convert a Single-
Ended Bipolar Signal into a Differential Unipolar Signal) show
how a dual op amp can be used to convert a single-ended signal
into a differential signal for both a bipolar and unipolar input
signal, respectively.
The voltage applied to Point A sets up the common-mode volt-
age. In both diagrams, it is connected in some way to the
reference, but any value in the common-mode range can be
input here to set up the common mode. The AD8022 is a suit-
able dual op amp that can be used in this configuration to
provide differential drive to the ADC.
Take care when choosing the op amp; the selection depends on
the required power supply and system performance objectives.
The driver circuits in Figure 78 (Dual Op Amp Circuit to Con-
vert a Single-Ended Unipolar Signal into a Differential Signal)
and Figure 79 (Dual Op Amp Circuit to Convert a Single-Ended
Bipolar Signal into a Differential Unipolar Signal) are optimized
for dc coupling applications requiring best distortion
performance.
The circuit configuration shown in Figure 78 (Dual Op Amp
Circuit to Convert a Single-Ended Unipolar Signal into a Differ-
ential Signal) converts a unipolar, single-ended signal into a
differential signal.
The differential op amp driver circuit shown in Figure 79 (Dual
Op Amp Circuit to Convert a Single-Ended Bipolar Signal into a
Differential Unipolar Signal) is configured to convert and level
shift a single-ended, ground-referenced (bipolar) signal to a dif-
ferential signal centered at the VREF level of the ADC.
Pseudo Differential Mode
The ADC can have a total of six pseudo differential pairs. In this
mode, VIN+ is connected to the signal source that must have an
amplitude of VREF (or 2 × VREF, depending on the range chosen)
Figure 76. Input Common-Mode Range vs. VREF (0 to VREF Range, VDD = 5 V)
Figure 77. Input Common-Mode Range vs. VREF (2 × VREF Range, VDD = 5 V)
VREF (V)
5.0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
TA = 25°C
VREF (V)
2.5
0
0.5
1.0
1.5
2.0
5.0
4.0
4.5
3.0
3.5
2.0
2.5
0.5
1.0
1.5
0
TA = 25°C
Figure 78. Dual Op Amp Circuit to Convert a Single-Ended Unipolar Signal
into a Differential Signal
GND
2× VREF p–p
27
27
V+
V–
V+
V–
VREF
2.5V
3.75V
1.25V
2.5V
3.75V
1.25V
VREF
(DCAPA/DCAPB)
VIN+
ADC1
VIN–
440
220
0.47μF
1ADDITIONAL PINS OMITTED FOR CLARITY.
220
220
10k
A



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