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TNETX3100 数据表(PDF) 27 Page - Texas Instruments |
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TNETX3100 数据表(HTML) 27 Page - Texas Instruments |
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27 / 80 page ![]() TNETX3100 ThunderSWITCH™ 10-PORT 10-/100-MBIT/S ETHERNET™ SWITCH SPWS031D – JUNE 1997 – REVISED OCTOBER 1997 27 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 address register description (continued) The address-learning operation is disabled on a per-port basis by setting the NLEARN bit in the port control register. When a frame is received by a port that has its NLEARN bit set, the source address is not pushed onto the stack. To prevent multiple copies of the same address filling the stack, the push-down mechanism is modified; if the stack already contains an entry with the same network address (possibly with a different port number), then the registers below that location are protected from being overwritten. Addresses that are seen repeatedly remain near the top of the stack and those that are seen infrequently work their way toward the bottom of the stack as new addresses are required, until they are finally aged out by being pushed off the end of the stack. When the TNETX3100 is reset, the stack is initialized such that all entries have a network address of zero and a port number of 15; this identifies the entry as invalid and no address matching can be performed with such an entry. The address-learning capability of the uplink (port 00) is restricted by setting the LIMLRN bit of the FEACFG register to a 1. In this mode, port 00 learns addresses only from frames it receives if the destination address has already been learned (currently in the address table). The learning capability of the port is still disabled if the ports NLEARN bit is set. secured address The TNETX3100 can secure addresses to specified ports. When an address is secured to a specified port, that source address is used only with that port. Use of a secured address on a port to which it is not assigned causes the received frame to be discarded. An address is considered secure if the least-significant bit of that address is a 1. When an address is pushed onto the stack, the least-significant bit (G/S bit) is discarded and replaced by a zero. This causes the learned address to be unsecured. A secured address entry in the stack modifies the push-down mechanism such that the secured address entry and all those below it are protected from being overwritten. When secured addresses are at the bottom end of the stack, this decreases the depth of the stack of learned addresses and prevents the secured addresses from being aged out. A secured address prevents that source address from being used on another port. If the source address is secured to another port, then the frame is discarded and if the SECDIS bit is set, the receiving port enters the disabled due to address duplication state. DIO access to address registers The network registers must be locked to prevent the registers from changing. LOCK is set before reading or writing to the address registers. When LOCK = 1, no new addresses become learned addresses by the TNETX3100, but the TNETX3100 continues to route frames based upon the network registers. After reset, the address registers are zero. LOCK is present only for network address register 0 and register 16; LOCK is reserved for all other network registers (1–15, 17–31). |
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