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TNETX3100 数据表(PDF) 33 Page - Texas Instruments |
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TNETX3100 数据表(HTML) 33 Page - Texas Instruments |
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33 / 80 page  TNETX3100 ThunderSWITCH™ 10-PORT 10-/100-MBIT/S ETHERNET™ SWITCH SPWS031D – JUNE 1997 – REVISED OCTOBER 1997 33 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Table 6. VLAN Register Initial Values REGISTER NAME INITIAL VALUE DIO ADDRESS REGISTER NAME +1 +0 DIO ADDRESS VLAN 0 MASK 00000011 11111110 0x00B8 VLAN 1 MASK 00000011 01111101 0x00BA VLAN 2 MASK 00000011 11111011 0x00BC VLAN 3 MASK 00000011 11110111 0x00BE VLAN 4 MASK 00000011 11101111 0x00C0 VLAN 5 MASK 00000011 11011111 0x00C2 VLAN 6 MASK 00000011 10111111 0x00C4 VLAN 7 MASK 00000011 01111111 0x00C6 VLAN 8 MASK 00000010 11111111 0x00C8 VLAN 9 MASK 00000001 11111111 0x00CA When EAM bit-map direction is in use, the VLAN registers are used to store the bit mask from the EAM. VLAN registers are loaded before the DRAM initialization (before the START bit is set). free queue-length register at 0x00CC–0x00CE BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 DIO ADDRESS Free queue length (7–0) 0x0CC Free queue length (15–8) 0x0CD Reserved Free queue length (17–16) 0x0CE This register contains the number of buffers currently on the free queue and is set to the total number of buffers in the system at device initialization. The user should always read 0x0CC first; reading this location causes the register contents to transfer to a holding latch to prevent the value from changing while being read. Writes to this register have no effect. feature-configuration register (FEACFG) at 0x00D0 BIT 7 6 5 4 3 2 1 0 Reserved TXAIS LIMLRN EAMON TPHY Initial Values After Reset X X X X 0 0 0 0 BIT NAME FUNCTION 7–4 Reserved Reserved 3 TXAIS Transmit activity indication select. When TXAIS = 1, the port LED indicates all RX and all TX activity. When TXAIS = 0, the LEDs indicate unicast TX-frame activity and all RX-frame activity. 2 LIMLRN Limit learning. When LIMLRN = 1, the address-learning capability of the uplink (port 00) is restricted. In this mode, port 00 learns addresses from frames it receives if the destination address already has been learned (currently in the address table). If NLEARN = 0 in the port 00 control register, LIMLRN has no effect. 1 EAMON EAM enable bit. When EAMON = 1, the TNETX3100 uses EAM hardware; when EAMON = 0, the EAMXX terminals are ignored. 0 Reserved Reserved |
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