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STA321 数据表(PDF) 151 Page - STMicroelectronics |
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STA321 数据表(HTML) 151 Page - STMicroelectronics |
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151 / 157 page  STA321 I2C disabled (microless) mode Doc ID 15351 Rev 3 151/157 The input sampling frequency must be between 32 kHz and 48 kHz and the master clock input (MCLK or XTI) must be 256 * fS. The CMOS bridge FFX output is configured in line-out mode: left channel binary on OUT1 right channel binary on OUT2 zero signal binary (duty cycle 50%) on OUT3 pop-free digital ramp active volume control not effective (always 0 dB) switching frequency 384 kHz. The external amplifier FFX output is configured in BTL mode: left channel BTL (new ternary modulation) on EAPWM1 and EAPWM2 right channel BTL (new ternary modulation) on EAPWM1 and EAPWM2 volume control is effective switching frequency 384 kHz. The headphone detection is disabled. The CLKOUT pad is active at the PLL frequency of 2048 * fS. |
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