AM79C978VCSLASHW datasheet(171/261 Pages) AMD

171 / 261 page

Am79C978

171

whenever a read or write transac-

tion occurs to BCR34. The PHY

address 1Fh is not valid.

The Network Port Manager cop-

ies

the

PHYAD

after

the

Am79C978 controller reads the

EEPROM and uses it to commu-

nicate with the external PHY. The

PHY

address

must

pro-

grammed into the EEPROM prior

to starting the Am79C978 con-

troller.

These bits are always read/write

accessible. PHYAD is undefined

after H_RESET and is unaffected

by S_RESET and the STOP bit.

4-0

REGAD

Management Frame Register Ad-

dress. REGAD contains the 5-bit

used in the management frame

that gets clocked out via the inter-

nal MII management interface

whenever a read or write transac-

tion occurs to BCR34.

These bits are always read/write

accessible. REGAD is undefined

after H_RESET and is unaffected

by S_RESET and the STOP bit.

BCR34: PHY Management Data Register

Bit

Name

Description

31-16 RES

Reserved locations. Written as

zeros and read as undefined.

15-0

MIIMD

MII Management Data. MIIMD is

the data port for operations on the

MII management interface (MDIO

and MDC). The Am79C978 con-

troller builds management frames

using the PHYAD and REGAD

values from BCR33. The opera-

tion code used in each frame is

based upon whether a read or

write operation has been per-

formed to BCR34. Read cycles

on the MII management interface

are invoked when BCR34 is read.

Upon completion of the read cy-

cle, the 16-bit result of the read

operation is stored in MIIMD.

Write cycles on the MII manage-

ment interface are invoked when

BCR34 is written. The value writ-

ten to MIIMD is the value used in

the data field of the management

write frame.

These bits are always read/write

accessible. MIIMD is undefined

after H_RESET and is unaffected

by S_RESET and the STOP bit.

BCR35: PCI Vendor ID Register

Note: Bits 15-0 in this register are programmable

through the EEPROM.

Bit

Name

Description

31-16 RES

Reserved locations. Written as

zeros and read as undefined.

15-0

VID

Vendor ID. The PCI Vendor ID

identifies the manufacturer of the

Am79C978

controller.

AMD’s

Vendor ID is 1022h. Note that this

Vendor ID is not the same as the

Manufacturer ID in CSR88 and

CSR89. The Vendor ID is as-

signed by the PCI Special Inter-

est Group.

The Vendor ID is not normally

programmable,

but

the

Am79C978 controller allows this

due to legacy operating systems

that do not look at the PCI Sub-

system Vendor ID and the Ven-

dor ID to uniquely identify the

add-in board or subsystem that

the Am79C978 controller is used

in.

Note: If the operating system

or the network operating sys-

tem supports PCI Subsystem

Vendor ID and Subsystem ID,

use those to identify the add-in

board or subsystem and pro-

gram the VID with the default

value of 1022h.

VID is aliased to the PCI configu-

ration space register Vendor ID

(offset 00h).

Read accessible always. VID is

read only. Write operations are

ignored. VID is set to 1022h by

H_RESET and is not affected by

S_RESET or by setting the STOP

bit.

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