AM79C978VCSLASHW datasheet(160/261 Pages) AMD

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160

Am79C978

operation. For example, if the

aborted PREAD operation imme-

diately followed the H_RESET

operation, then the final state of

the EEPROM programmable lo-

cations will be equal to the

H_RESET

programming

for

those locations.

If a PREAD command is given to

the Am79C978 controller and the

auto-detection pin (EESK/LED1)

indicates that no EEPROM is

present, then the EEPROM read

operation will still be attempted.

Note that at the end of the

H_RESET operation, a read of

the EEPROM will be performed

automatically. This H_RESET-

generated EEPROM read func-

tion will not proceed if the auto-

detection pin (EESK/LED1) indi-

cates

that

EEPROM

present.

This bit is read accessible al-

ways; write accessible only when

either the STOP or the SPND bit

is set. PREAD is set to 0 during

H_RESET and is unaffected by

S_RESET or the STOP bit.

EEDET

EEPROM Detect. This bit indi-

cates the sampled value of the

EESK/LED1 pin at the end of

H_RESET. This value indicates

whether or not an EEPROM is

present at the EEPROM inter-

face. If this bit is a 1, it indicates

that an EEPROM is present. If

this bit is a 0, it indicates that an

EEPROM is not present.

This bit is read accessible only.

EEDET is read only; write opera-

tions have no effect. The value of

this bit is determined at the end of

the H_RESET operation. It is un-

affected by S_RESET or the

STOP bit.

Table 38 indicates the possible

combinations of EEDET and the

existence of an EEPROM and the

resulting operations that are pos-

sible on the EEPROM interface.

12-5

RES

Reserved locations. Written as

zeros; read as undefined.

EEN

EEPROM Port Enable. When this

bit is set to a 1, it causes the val-

ues of ECS, ESK, and EDI to be

driven onto the EECS, EESK,

and EEDI pins, respectively. If

EEN = 0 and no EEPROM read

function is currently active, then

EECS will be driven LOW. When

EEN = 0 and no EEPROM read

function is currently active, EESK

and EEDI pins will be driven by

the LED registers BCR5 and

BCR4, respectively. See Table

39.

This bit is read accessible al-

ways, write accessible only when

either the STOP or the SPND bit

is set. EEN is set to 0 by

H_RESET and is unaffected by

the S_RESET or STOP bit.

RES

Reserved location. Written as

zero and read as undefined.

ECS

EEPROM Chip Select. This bit is

used to control the value of the

EECS pin of the interface when

the EEN bit is set to 1 and the

PREAD bit is set to 0. If EEN = 1

and PREAD = 0 and ECS is set to

a 1, then the EECS pin will be

forced to a HIGH level at the ris-

ing edge of the next clock follow-

ing bit programming.

If EEN = 1 and PREAD = 0 and

ECS is set to a 0, then the EECS

pin will be forced to a LOW level

at the rising edge of the next

clock following bit programming.

ECS has no effect on the output

value of the EECS pin unless the

PREAD bit is set to 0 and the

EEN bit is set to 1.

This bit is read accessible al-

ways, write accessible only when

either the STOP or the SPND bit

is set. ECS is set to 0 by

H_RESET and is not affected by

S_RESET or STOP.

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AM79C978VC/W 数据表(PDF) 160 Page - Advanced Micro Devices

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