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PIC16F72/ML 数据表(PDF) 131 Page - Microchip Technology |
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PIC16F72/ML 数据表(HTML) 131 Page - Microchip Technology |
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131 / 136 page  2002 Microchip Technology Inc. DS39597B-page 129 PIC16F72 Timing Diagrams A/D Conversion ......................................................... 105 Brown-out Reset ......................................................... 96 Capture/Compare/PWM (CCP1)................................. 98 CLKO and I/O ............................................................. 95 External Clock............................................................. 94 I2C Bus Data ............................................................. 102 I2C Bus START/STOP bits........................................ 101 I2C Reception (7-bit Address) ..................................... 50 I2C Transmission (7-bit Address) ................................ 50 RESET, Watchdog Timer, Oscillator Start-up Timer and Power-up Timer............................................... 96 Slow Rise Time (MCLR Tied to VDD Through RC Network)........................................................... 68 SPI Master Mode ........................................................ 47 SPI Master Mode (CKE = 0, SMP = 0) ....................... 99 SPI Master Mode (CKE = 1, SMP = 1) ....................... 99 SPI Slave Mode (CKE = 0) ................................. 47, 100 SPI Slave Mode (CKE = 1) ................................. 47, 100 Time-out Sequence on Power-up (MCLR Tied to VDD Through Pull-up Resistor)............................... 67 Time-out Sequence on Power-up (MCLR Tied to VDD Through RC Network): Case 1 ....................... 67 Time-out Sequence on Power-up (MCLR Tied to VDD Through RC Network): Case 2 ....................... 67 Timer0 and Timer1 External Clock.............................. 97 Wake-up from SLEEP through Interrupt ..................... 72 Timing Parameter Symbology............................................. 93 TMR1H Register ................................................................... 9 TMR1L Register .................................................................... 9 TMR2 Register ...................................................................... 9 TMR2ON bit ........................................................................ 36 TOUTPS0 bit....................................................................... 36 TOUTPS1 bit....................................................................... 36 TOUTPS2 bit....................................................................... 36 TOUTPS3 bit....................................................................... 36 TRISA Register ............................................................. 10, 21 TRISB Register ............................................................. 10, 23 TRISC Register ............................................................. 10, 25 U UA....................................................................................... 44 Update Address bit, UA ...................................................... 44 W Wake-up from SLEEP................................................... 59, 71 Interrupts .............................................................. 65, 66 MCLR Reset ............................................................... 66 WDT Reset ................................................................. 66 Watchdog Timer (WDT)................................................ 59, 70 Associated Registers.................................................. 70 Enable (WDTEN bit) ................................................... 70 Postscaler. See Postscaler, WDT Programming Considerations ..................................... 70 RC Oscillator .............................................................. 70 Time-out Period .......................................................... 70 WDT Reset, Normal Operation....................... 62, 65, 66 WDT Reset, SLEEP ....................................... 62, 65, 66 WCOL ................................................................................. 45 Write Collision Detect bit, WCOL........................................ 45 WWW, On-Line Support ....................................................... 3 |
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