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PIC16F72/ML 数据表(PDF) 127 Page - Microchip Technology |
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PIC16F72/ML 数据表(HTML) 127 Page - Microchip Technology |
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127 / 136 page ![]() 2002 Microchip Technology Inc. DS39597B-page 125 PIC16F72 INDEX A A/D Acquisition Requirements ........................................... 56 ADCON0 Register....................................................... 53 ADCON1 Register....................................................... 53 ADIF bit ....................................................................... 54 ADRES Register ......................................................... 53 Analog-to-Digital Converter......................................... 53 Associated Registers .................................................. 57 Configuring Analog Port Pins...................................... 56 Configuring the Interrupt ............................................. 54 Configuring the Module............................................... 54 Conversion Clock........................................................ 56 Conversions ................................................................ 56 Converter Characteristics ......................................... 104 Effects of a RESET ..................................................... 57 Internal Sampling Switch (Rss) Impedance ................ 56 Operation During SLEEP ............................................ 57 Source Impedance...................................................... 56 Use of the the CCP Trigger......................................... 57 Absolute Maximum Ratings ................................................ 87 ACK..................................................................................... 49 ADCON0 GO/DONE bit ...................................................... 54 ADRES Register ............................................................. 9, 54 Application Notes AN546 (Using the Analog-to-Digital Converter) .......... 53 AN552 (Implementing Wake-up on Key Strokes Using PIC16F7X) ............................... 23 AN556 (Implementing a Table Read).......................... 19 AN578 (Use of the SSP Module in the I2C Multi-Master Environment)............................... 43 AN607 (Power-up Trouble Shooting) .......................... 64 Assembler MPASM Assembler ..................................................... 81 B BF ....................................................................................... 44 Block Diagrams A/D .............................................................................. 55 Analog Input Model ..................................................... 55 Capture Mode Operation ............................................ 38 Compare Mode Operation .......................................... 39 In-Circuit Serial Programming Connections................ 72 Interrupt Logic ............................................................. 68 On-Chip Reset Circuit ................................................. 63 PIC16F72...................................................................... 5 PORTC ....................................................................... 25 PWM ........................................................................... 41 RA3:RA0 and RA5 Port Pins ...................................... 21 RA4/T0CKI Pin............................................................ 21 RB3:RB0 Port Pins ..................................................... 23 RB7:RB4 Port Pins ..................................................... 23 Recommended MCLR Circuit ..................................... 63 SSP in I2C Mode ......................................................... 48 SSP in SPI Mode ........................................................ 46 Timer0/WDT Prescaler................................................ 29 Timer1 ......................................................................... 32 Timer2 ......................................................................... 35 Watchdog Timer (WDT) .............................................. 70 BOR. See Brown-out Reset Brown-out Reset (BOR) .................................... 59, 62, 65, 66 Buffer Full Status bit, BF ..................................................... 44 C Capture/Compare/PWM ..................................................... 37 Associated Registers with PWM and Timer2.............. 42 Associated Registers, Capture, Compare and Timer1............................................................. 40 Capture CCP1IF............................................................... 38 CCPR1 ............................................................... 38 CCPR1H:CCPR1L.............................................. 38 Capture Mode ............................................................. 38 CCP Mode Timer Resources...................................... 37 CCP Pin Configuration ......................................... 38, 39 CCP Prescaler............................................................ 38 CCPR1L Register ....................................................... 37 Compare Mode ........................................................... 39 PWM Mode ................................................................. 41 PWM, Example Frequencies/Resolutions .................. 42 Software Interrupt ....................................................... 38 Software Interrupt Mode ............................................. 39 Special Event Trigger and A/D Conversions .............. 39 Special Event Trigger Output of CCP1 ....................... 39 Timer1 Mode Selection......................................... 38, 39 CCPR1H Register............................................................... 37 CCPxM0 bit......................................................................... 37 CCPxM1 bit......................................................................... 37 CCPxM2 bit......................................................................... 37 CCPxM3 bit......................................................................... 37 CCPxX bit ........................................................................... 37 CCPxY bit ........................................................................... 37 CKE .................................................................................... 44 CKP .................................................................................... 45 Clock Polarity Select bit, CKP............................................. 45 Code Examples Changing Between Capture Prescalers ..................... 38 FLASH Program Read................................................ 28 Indirect Addressing ..................................................... 19 Initializing PORTA....................................................... 21 Initializing PORTB ...................................................... 23 Initializing PORTC ...................................................... 25 Saving STATUS, W and PCLATH Registers in RAM................................................... 69 Code Protection ............................................................ 59, 72 Configuration Bits ............................................................... 59 Configuration Word............................................................. 60 Conversion Considerations............................................... 123 D D/A...................................................................................... 44 Data Memory General Purpose Register File ..................................... 7 Special Function Registers........................................... 9 Data/Address bit, D/A ......................................................... 44 DC and AC Characteristics Graphs and Tables ................................................... 107 DC Characteristics.............................................................. 89 Development Support ......................................................... 81 Device Overview................................................................... 5 Direct Addressing ............................................................... 20 E Electrical Characteristics .................................................... 87 Errata .................................................................................... 3 |
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