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SPEAR320S 数据表(PDF) 60 Page - STMicroelectronics |
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SPEAR320S 数据表(HTML) 60 Page - STMicroelectronics |
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60 / 113 page  Pin description SPEAr320S 60/113 Doc ID 022508 Rev 2 Table 28. I2C signals description Signal name Description Dir. PL_GPIO_# /Ball Configuration mode I2C0 I2C0_SCL I2C0 input/output clock IO PL_GPIO_4/C1 Alternate function I2C0_SDA I2C0 input/output data IO PL_GPIO_5/D2 Alternate function I2C1 I2C1_SCL I2C1 input/output clock IO PL_CLK2/J17 3, Extended PL_GPIO_8/C2 Extended mode I2C1_SDA I2C1 input/output data IO PL_CLK1/K17 3, Extended PL_GPIO_9/B2 Extended mode I2C2 I2C2_SCL I2C2 input/output clock IO PL_GPIO_2/E4 1, Extended PL_GPIO_19/A3 2, Extended PL_GPIO_96/H15 4, Extended PL_GPIO_75/E14 Extended mode PL_GPIO_0/F3 I2C2_SDA I2C2 input/output data IO PL_GPIO_3/D1 1, Extended PL_GPIO_20/B4 2, Extended PL_GPIO_97/H16 4, Extended PL_GPIO_76/F13 Extended mode PL_GPIO_1/E3 Table 29. I2S signals description Signal name Description Dir. PL_GPIO_# /Ball Configuration mode audio_over_samp_clk Audio oversampling clock. This is the clock that I2S_CLK derives from. The interfacing digital-to-analog converter (DAC) can use this clock to (over)sample the I2S data. O PL_GPIO_35/D8 1, 2, Extended I2S_CLK I2S clock O PL_GPIO_39/A9 1, 2, Extended I2S_LR I2S word select O PL_GPIO_40/B9 1, 2, Extended I2S_RX I2S receive data I PL_GPIO_42/D9 1, 2, Extended I2S_TX I2S transmit data O PL_GPIO_41/C9 1, 2, Extended |
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