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SPEAR320S 数据表(PDF) 65 Page - STMicroelectronics |
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SPEAR320S 数据表(HTML) 65 Page - STMicroelectronics |
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65 / 113 page  SPEAr320S Pin description Doc ID 022508 Rev 2 65/113 RMII0_CRS_DV PHY receive data valid Contains the CRS (carrier sense) and data valid information of the receive interface. I PL_GPIO_14/A2 Extended mode RMII0_RX_ER PHY receive error I PL_GPIO_13/A1 Extended mode RMII0_RXD0 PHY receive data These bits provide the RMII receive data. The validity of the data is qualified with RMII0_CRS_DV. I PL_GPIO_26/A5 Extended mode RMII0_RXD1 PL_GPIO_15/B3 Extended mode RMII0_TX_EN PHY transmit data enable When high, indicates that valid data is being transmitted on the RMII_TXDn bus O PL_GPIO_16/E6 Extended mode RMII0_TXD0 PHY transmit data These bits provide the RMII transmit data. The validity of the data is qualified with RMII0_TX_EN. O PL_GPIO_27/B6 Extended mode RMII0_TXD1 PL_GPIO_17/C4 Extended mode RMII1_CRS_DV PHY receive data valid Contains the crs and data valid information of the receive interface. I PL_GPIO_19/A3 Extended mode RMII1_RX_ER PHY receive error I PL_GPIO_18/D5 Extended mode RMII1_RXD0 PHY receive data These bits provide the RMII receive data. The validity of the data is qualified with RMII1_CRS_DV. I PL_GPIO_24/B5 Extended mode RMII1_RXD1 PL_GPIO_20/B4 Extended mode RMII1_TX_EN PHY transmit data enable When high, it indicates that valid data is being transmitted on the RMII_TXDn bus. O PL_GPIO_23/A4 Extended mode RMII1_TXD0 PHY transmit data These bits provide the RMII transmit data. The validity of the data is qualified with RMII1_TX_EN. O PL_GPIO_25/C6 Extended mode RMII1_TXD1 PL_GPIO_21/C5 Extended mode Table 31. Ethernet signals description (continued) Signal name Description Dir. PL_GPIO_# / ball number Configuration mode (see Section 3.4.2) |
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