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LSM6DS3 数据表(PDF) 50 Page - STMicroelectronics |
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LSM6DS3 数据表(HTML) 50 Page - STMicroelectronics |
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50 / 100 page ![]() Register description LSM6DS3 50/100 DocID026899 Rev 8 9.8 ORIENT_CFG_G (0Bh) Angular rate sensor sign and orientation register (r/w). Table 37. ORIENT_CFG_G register Table 35. FIFO ODR selection ODR_FIFO_[3:0] Configuration(1) 1. If the device is working at an ODR slower than the one selected, FIFO ODR is limited to that ODR value. Moreover, these bits are effective if both the DATA_VALID_SEL FIFO bit of MASTER_CONFIG (1Ah) and the TIMER_PEDO_FIFO_DRDY bit of FIFO_CTRL2 (07h) are set to 0. 0000 FIFO disabled 0001 FIFO ODR is set to 12.5 Hz 0010 FIFO ODR is set to 26 Hz 0011 FIFO ODR is set to 52 Hz 0100 FIFO ODR is set to 104 Hz 0101 FIFO ODR is set to 208 Hz 0110 FIFO ODR is set to 416 Hz 0111 FIFO ODR is set to 833 Hz 1000 FIFO ODR is set to 1.66 kHz 1001 FIFO ODR is set to 3.33 kHz 1010 FIFO ODR is set to 6.66 kHz Table 36. FIFO mode selection FIFO_MODE_[2:0] Configuration mode 000 Bypass mode. FIFO disabled. 001 FIFO mode. Stops collecting data when FIFO is full. 010 Reserved 011 Continuous mode until trigger is deasserted, then FIFO mode. 100 Bypass mode until trigger is deasserted, then Continuous mode. 101 Reserved 110 Continuous mode. If the FIFO is full, the new sample overwrites the older one. 111 Reserved 0(1) 1. This bit must be set to ‘0’ for the correct operation of the device. 0(1) SignX_G SignY_G SignZ_G Orient_2 Orient_1 Orient_0 |
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