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AD6652BBC 数据表(PDF) 67 Page - Analog Devices

部件名 AD6652BBC
功能描述  12-Bit, 65 MSPS IF to Baseband Diversity Receiver
PDF  76 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD6652BBC 数据表(HTML) 67 Page - Analog Devices

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AD6652
Rev. 0 | Page 67 of 76
Comments
Address
Register
Bit Width
3:
Sync now
2:
Init on Sync
1:
First sync only
0:
Bypass
13
AGC B Hold-Off Counter
16
15–0:
Hold-off value
14
AGC B Desired Level
8
7–0:
Desired output power level or clipping energy (R parameter)
15
AGC B Signal Gain
12
11–0:
Gs parameter
16
AGC B Loop Gain
8
7–0:
K parameter
17
AGC B Pole Location
8
7–0:
P parameter
18
AGC B Average Samples
6
5–2:
Scale for CIC decimator
1–0:
Number of averaging samples
19
AGC B Update Decimation
12
11–0:
CIC decimation
1A
Parallel A Control
8
7–6:
Reserved
5:
Parallel port data format
1:
8-bit parallel I, Q
0:
16-bit interleaved I, Q
4:
Channel 3
3:
Channel 2
2:
Channel 1/AGC B enable
1:
Channel 0/AGC A enable
0:
AGC_CH select
1:
Data comes from AGCs
0:
Data comes from channels
1B
Link A Control
8
7:
Link Port A enable
6–3:
Wait
2:
No RSSI word
1:
Don’t output RSSI word
0:
Output RSSI word
1:
Channel data interleaved
1:
2-channel mode/separate AB
0:
4-channel mode/AB same port
0:
AGC_CH select
1:
Data comes from AGCs
0:
Data comes from channels
1C
Parallel B Control
8
7–6:
Reserved
5:
Parallel port data format
1:
8-bit parallel I, Q
0:
16-bit interleaved I, Q
4:
Channel 3
3:
Channel 2
2:
Channel 1/AGC B enable
1:
Channel 0/AGC A enable
0:
AGC_CH select
1:
Data comes from AGCs
0:
Data comes from channels
1D
Link B Control
8
7:
Link Port B enable
6–3:
Wait
2:
No RSSI word
1:
Do not output RSSI word
0:
Output RSSI word



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