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AR8327-AL1A-R 数据表(PDF) 272 Page - List of Unclassifed Manufacturers |
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AR8327-AL1A-R 数据表(HTML) 272 Page - List of Unclassifed Manufacturers |
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272 / 394 page ![]() 272 • AR8327/AR8327N Seven-port Gigabit Ethernet Switch Atheros Communications, Inc. 272 • June 2011 COMPANY CONFIDENTIAL 3.7.102 ACL_RATE_CTRL0_9 Address 0x0A48 FT&HW RST Table 3-253, “ACL_9 Rate Control Register 0,” on page 272 summerizes the ACL_RATE_CTRL0_9 Register 0 Table 3-253. ACL_9 Rate Control Register 0 3.7.103 ACL_RATE_CTRL1_9 Address 0x0A4C SFT&HW RST Table 3-254, “ACL_9 Rate Control Register 1,” on page 273 summerizes the ACL_RATE_CTRL1_9 Register 1 17:15 R/W 0 ACL_EBS_8 Excess burst size for ingress rate limit 14:0 R/W 0x7FFF ACL_EIR_8 Ingress Rate Limit for all priority. Rate is limited to times of 32kbps. Default 15'h7FFF is for disable rate limit for ingress. if these bits are set to 15'h0, no frame should be received in from this port. Bit R/W Inital Value Mnemonic Description Bit R/W Inital Value Mnemonic Description 31:18 R/O 0 RESERVED 17:15 R/W 0 ACL_CBS_9 Commited burst size for ingress rate limit 14:0 R/W 0x7FFF ACL_CIR_9 Ingress Rate Limit for all priority. Rate is limited to times of 32kbps. Default 15'h7FFF is for disable rate limit for ingress. if these bits are set to 15'h0, no frame should be received in from this port. |
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