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AR8327-AL1A-R 数据表(PDF) 273 Page - List of Unclassifed Manufacturers |
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AR8327-AL1A-R 数据表(HTML) 273 Page - List of Unclassifed Manufacturers |
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273 / 394 page ![]() Atheros Communications, Inc. AR8327/AR8327N Seven-port Gigabit Ethernet Switch • 273 Table 3-254. ACL_9 Rate Control Register 1 3.7.104 ACL_RATE_CTRL0_10 Address 0x0A50 SFT&HW RST Table 3-255, “ACL_10 Rate Control Register 0,” on page 273 summerizes the ACL_RATE_CTRL0_10 Register 0 Table 3-255. ACL_10 Rate Control Register 0 Bit R/W Inital Value Mnemonic Description 31:24 R/O 0 RESERVED 23 R/W 0 ACL_BORROW_EN_9 Borrow enable 22 R/W 0 ACL_RATE_UNIT_9 1: Packets/ 0: bytes 21 R/W 0 ACL_CF_9 Coupling flag for ingress rate limit 20 R/W 0 ACL_CM_9 Color mode for ingress rate limit 19:18 R/W 2'b01 ACL_RATE_TIME_SLOT_9 ACL Ingress rate limit control timer slot. 2'b00: 100us; 2'b01: 1ms 2'b10: 10ms 2'b11: 100ms Notes: if port rate limit set to less than 96kbps, don't select 100us as time slot 17:15 R/W 0 ACL_EBS_9 Excess burst size for ingress rate limit 14:0 R/W 0x7FFF ACL_EIR_9 Ingress Rate Limit for all priority. Rate is limited to times of 32kbps. Default 15'h7FFF is for disable rate limit for ingress. if these bits are set to 15'h0, no frame should be received in from this port. Bit R/W Inital Value Mnemonic Description 31:18 R/O 0 RESERVED 17:15 R/W 0 ACL_CBS_10 Commited burst size for ingress rate limit 14:0 R/W 0x7FFF ACL_CIR_10 Ingress Rate Limit for all priority. Rate is limited to times of 32kbps. Default 15'h7FFF is for disable rate limit for ingress. if these bits are set to 15'h0, no frame should be received in from this port. |
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