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AR8327-AL1A-R 数据表(PDF) 356 Page - List of Unclassifed Manufacturers |
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AR8327-AL1A-R 数据表(HTML) 356 Page - List of Unclassifed Manufacturers |
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356 / 394 page ![]() 356 • AR8327/AR8327N Seven-port Gigabit Ethernet Switch Atheros Communications, Inc. 356 • June 2011 COMPANY CONFIDENTIAL Table 3-376, “1000Base-T Status Register,” on page 356 summarizes the Register Table 3-376. 1000Base-T Status Register 3.10.12 MMD Access Control Register Address Offset: 0x0D, or 0d13 Table 3-377, “MMD Access Control Register,” on page 357 summarizes the Register Bit Symbol Type Description 15 Master/Slave Configuration Fault Mode RO, LH This register bit will clear on read 1: Master/Slave configuration fault detected 0: No fault detected HW Rst 0 SW Rst 0 14 Master/Slave Configuration Resolution Mode RO This register bit is not valid until register 6.1 is 1. 1: Local PHY cnfiguration resolved to Master 0: Local PHY cnfiguration resolved to Slave HW Rst 0 SW Rst 0 13 Local Receiver Status Mode RO 1:Local Receiver OK 0:Local Receiver Not OK HW Rst 0 SW Rst 0 12 Remote Receiver Status Mode RO 1:Remote Receiver OK 0:Remote Receiver Not OK HW Rst 0 SW Rst 0 11 Link Partner 1000Base-T Full Duplex Capability Mode RO This register bit is not valid until register 6.1 is 1. 1: Link Partner is capable of 1000Base-T half duplex 0: Link Partner is not capable of 1000Base-T half duplex HW Rst 0 SW Rst 0 10 Link Partner 1000Base-T Half Duplex Capability Mode RO This register bit is not valid until register 6.1 is 1. 1: Link Partner is capable of 1000Base-T full duplex 0: Link Partner is not capable of 1000Base-T full duplex HW Rst 0 SW Rst 0 9:8 Reserved Mode RO HW Rst Always 0 SW Rst Always 0 7:0 Idle Error Count Mode RO, SC MSB of Idle Error Counter These register bits report the idle error count since the last time this register was read. The counter pegs at 11111111 and will not roll over. HW Rst 0 SW Rst 0 |
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