EDB8164B4PR-1DITF-R datasheet(93/152 Pages) MICRON

93 / 152 page

To exit DPD, CKE must be HIGH, tISCKE must be complete, and the clock must be sta-

ble. To resume operation, the device must be fully reinitialized using the power-up initi-

alization sequence.

Figure 68: Deep Power-Down Entry and Exit Timing

RESET

NOP

Enter

DPD

NOP

Enter DPD mode

Input clock frequency can be changed

or the input clock can be stopped during DPD.

NOP

CK_c

CKE

CS_n

CMD

tDPD

tINIT31, 2

tIHCKE

tISCKE

tRP

tISCKE

Exit DPD mode

Don’t Care

2 tCK (MIN)

Exit

DPD

CK_t

Notes:

1. The initialization sequence can start at any time after Tx + 1.

2. tINIT3 and Tx + 1 refer to timings in the initialization sequence. For details, see Mode

Input Clock Frequency Changes and Stop Events

Input Clock Frequency Changes and Clock Stop with CKE LOW

During CKE LOW, the mobile LPDDR2 device supports input clock frequency changes

and clock stop under the following conditions:

• Refresh requirements are met

• Only REFab or REFpb commands can be in process

• Any ACTIVATE or PRECHARGE commands have completed prior to changing the fre-

quency

• Related timing conditions,tRCD and tRP, have been met prior to changing the fre-

quency

• The initial clock frequency must be maintained for a minimum of two clock cycles af-

ter CKE goes LOW

• The clock satisfies tCH(abs) and tCL(abs) for a minimum of two clock cycles prior to

CKE going HIGH

For input clock frequency changes, tCK(MIN) and tCK(MAX) must be met for each clock

cycle.

After the input clock frequency is changed and CKE is held HIGH, additional MRW

commands may be required to set the WR, RL, etc. These settings may require adjust-

ment to meet minimum timing requirements at the target clock frequency.

For clock stop, CK_t is held LOW and CK_c is held HIGH.

216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM

Input Clock Frequency Changes and Stop Events

09005aef85eb530a

216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

EDB8164B4PR-1DITF-R 数据表(PDF) 93 Page - Micron Technology

EDB8164B4PR-1DITF-R 数据表(HTML) 93 Page - Micron Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载